| 1992 | A comprehensive instruction fetch mechanism for a processor supporting speculative execution. | Tse-Yu Yeh, Yale N. Patt |
| 1992 | Ordering functions for improving memory reference locality in a shared memory multiprocessor system. | Youfeng Wu |
| 1992 | Executing compressed programs on an embedded RISC architecture. | Andrew Wolfe, Alex Chanin |
| 1992 | Toward zero-cost branches using instruction registers. | Kent D. Wilken, David W. Goodwin |
| 1992 | Enhanced modulo scheduling for loops with conditional branches. | Nancy J. Warter, Grant E. Haab, Krishna Subramanian, John W. Bockhaus |
| 1992 | A dynamic-programming technique for compacting loops. | Steven R. Vegdahl |
| 1992 | On the instruction-level characteristics of scalar code in highly-vectorized scientific applications. | Sriram Vajapeyam, Wei-Chung Hsu |
| 1992 | Data path issues in a highly concurrent machine. | Augustus K. Uht, Darin B. Johnson |
| 1992 | MISC: a Multiple Instruction Stream Computer. | Gary S. Tyson, Matthew K. Farrens, Andrew R. Pleszkun |
| 1992 | Limitation of superscalar microprocessor performance. | Thang Tran, Chuan-lin Wu |
| 1992 | On the limits of program parallelism and its smoothability. | Kevin B. Theobald, Guang R. Gao, Laurie J. Hendren |
| 1992 | Dominator-path scheduling: a global scheduling method. | Philip H. Sweany, Steven J. Beaty |
| 1992 | A VLIW architecture for optimal execution of branch-intensive loops. | Bogong Su, Wei Zhao, Zhizhong Tang, Stanley Habib |
| 1992 | Controlling and sequencing a heavily pipelined floating-point operator. | Andr Seznec, Karl Courtel |
| 1992 | Code generation schema for modulo scheduled loops. | B. Ramakrishna Rau, Michael S. Schlansker, Parthasarathy P. Tirumalai |
| 1992 | An efficient resource-constrained global scheduling technique for superscalar and VLIW processors. | Soo-Mook Moon, Kemal Ebcioglu |
| 1992 | A shape matching approach for scheduling fine-grained parallelism. | Brian A. Malloy, Rajiv Gupta, Mary Lou Soffa |
| 1992 | Interlock collapsing ALU for increased instruction-level parallelism. | Nadeem Malik, Richard J. Eickemeyer, Stamatis Vassiliadis |
| 1992 | Effective compiler support for predicated execution using the hyperblock. | Scott A. Mahlke, David C. Lin, William Y. Chen, Richard E. Hank, Roger A. Bringmann |
| 1992 | The effect of page allocation on caches. | William L. Lynch, Brian K. Bray, Michael J. Flynn |
| 1992 | Exploiting instruction-level parallelism: the multithreaded approach. | Philip LeNir, Ramaswamy Govindarajan, Shashank S. Nemawarkar |
| 1992 | Y-Pipe: a conditional branching scheme without pipeline delays. | Michael J. Knieser, Christos A. Papachristou |
| 1992 | Code scheduling for VLIW/superscalar processors with limited register files. | Tokuzo Kiyohara, John C. Gyllenhaal |
| 1992 | Performance analysis and design methodology for a scalable superscalar architecture. | Takaaki Kato, Toshihisa Ono, Nader Bagherzadeh |
| 1992 | A new approach to schedule operations across nested-ifs and nested-loops. | Shih-Hsu Huang, Cheng-Tsung Hwang, Yu-Chin Hsu, Yen-Jen Oyang |