| 1993 | A VLIW architecture based on shifting register files. | H. Fatih Ugurdag, Christos A. Papachristou |
| 1993 | Techniques for extracting instruction level parallelism on MIMD architectures. | Gary S. Tyson, Matthew K. Farrens |
| 1993 | GPMB - software pipelining branch-intensive loops. | Zhizhong Tang, Gang Chen, Chihong Zhang, Yingwei Zhang, Bogong Su, Stanley Habib |
| 1993 | A microarchitectural performance evaluation of a 3.2 Gbyte/s microprocessor bus. | Tim J. Stanley, Michael Upton, Patrick Sherhart, Trevor N. Mudge, Richard B. Brown |
| 1993 | Prophetic branches: a branch architecture for code compaction and efficient execution. | Apoorv Srivastava, Alvin M. Despain |
| 1993 | Instruction scheduling for the Motorola 88110. | Mark Smotherman, Shuchi Chawla, Stan Cox, Brian A. Malloy |
| 1993 | The 16-fold way: a microparallel taxonomy. | Barton Sano, Alvin M. Despain |
| 1993 | Measuring limits of parallelism and characterizing its vulnerability to resource constraints. | Lawrence Rauchwerger, Pradeep K. Dubey, Ravi Nair |
| 1993 | Dynamically scheduled VLIW processors. | B. Ramakrishna Rau |
| 1993 | Efficient scheduling of fine grain parallelism in loops. | M. Rajagopalan, Vicki H. Allan |
| 1993 | Control flow prediction for dynamic ILP processors. | Dionisios N. Pnevmatikatos, Manoj Franklin, Gurindar S. Sohi |
| 1993 | Employing finite automata for resource scheduling. | Thomas Mller |
| 1993 | Register renaming and dynamic speculation: an alternative approach. | Mayan Moudgill, Keshav Pingali, Stamatis Vassiliadis |
| 1993 | A study on the number of memory ports in multiple instruction issue machines. | Soo-Mook Moon, Kemal Ebcioglu |
| 1993 | An extended classification of inter-instruction dependency and its application in automatic synthesis of pipelined processors. | Ing-Jer Huang, Alvin M. Despain |
| 1993 | Superblock formation using static program analysis. | Richard E. Hank, Scott A. Mahlke, Roger A. Bringmann, John C. Gyllenhaal, Wen-mei W. Hwu |
| 1993 | Clocked and asynchronous instruction pipelines. | Mark A. Franklin, Tienyo Pan |
| 1993 | A comparision of superscalar and decoupled access/execute architectures. | Matthew K. Farrens, Pius Ng, Phil Nico |
| 1993 | MIDEE: smoothing branch and instruction cache miss penalties on deep pipelines. | Nathalie Drach, Andr Seznec |
| 1993 | EXPLORER: a retargetable and visualization-based trace-driven simulator for superscalar processors. | Trung A. Diep, John Paul Shen, Mike Phillip |
| 1993 | An analysis of dynamic scheduling techniques for symbolic applications. | Alessandra Costa, Alessandro De Gloria, Paolo Faraboschi, Mauro Olivieri |
| 1993 | A comparative performance evaluation of various state maintenance mechanisms. | Michael Butler, Yale N. Patt |
| 1993 | Speculative execution exception recovery using write-back suppression. | Roger A. Bringmann, Scott A. Mahlke, Richard E. Hank, John C. Gyllenhaal, Wen-mei W. Hwu |
| 1993 | An evaluation of bottom-up and top-down thread generation techniques. | A. P. Wim Bhm, Walid A. Najjar, Bhanu Shankar, Lucas Roh |
| 1993 | Predictability of load/store instruction latencies. | Santosh G. Abraham, Rabin A. Sugumar, Daniel Windheiser, B. Ramakrishna Rau, Rajiv Gupta |