| 2017 | Binary synthesis implementing external interrupt handler as independent module. | Naoya Ito, Yuuki Oosako, Nagisa Ishiura, Hiroyuki Kanbara, Hiroyuki Tomiyama |
| 2017 | An analysis of random cache effects on real-time multi-core scheduling algorithms. | Imane Hafnaoui, Chao Chen, Rabeh Ayari, Gabriela Nicolescu, Giovanni Beltrame |
| 2016 | On-board non-regression test of HLS tools targeting FPGA. | Arief Wicaksana, Adrien Prost-Boucle, Olivier Muller, Frdric Rousseau, Arif Sasongko |
| 2016 | RapidSoC: short turnaround creation of FPGA based SoCs. | Jakob Wenzel, Christian Hochberger |
| 2016 | On platforms for CPS - adaptive, predictable and efficient. | Lothar Thiele, Felix Sutton, Romain Jacob, Roman Lim, Reto Da Forno, Jan Beutel |
| 2016 | Automatic detection and elision of reset sub-circuits. | Panagiotis Patros, Kenneth B. Kent |
| 2016 | Design of an expandable real-time simulation (eRTS) platform for multi-level rapid prototyping. | Ankurkumar Patel, Troy Silloway, Fnu Qinggele, Yong-Kyu Jung |
| 2016 | Architecture exploration of intelligent robot system using ros-compliant FPGA component. | Takeshi Ohkawa, Kazushi Yamashina, Takuya Matsumoto, Kanemitsu Ootsu, Takashi Yokota |
| 2016 | Simulation driven insertion of data prefetching instructions for early software-on-SoC optimization. | Perrin N. Ntafam, Eric Paire, Alain Clouard, Frdric Ptrot |
| 2016 | Transforming VHDL descriptions into formal component-based models. | Ayoub Nouri, Rahma Ben Atitallah, Anca Molnos, Christian Fabre, Frdric Heitzmann, Olivier Debicki |
| 2016 | Keynote: rethinking memory system design. | Onur Mutlu |
| 2016 | Embedded virtualization for the design of secure IoT applications. | Carlos Moratelli, Sergio Johann Filho, Marcelo Veiga Neves, Fabiano Hessel |
| 2016 | HAMEX: heterogeneous architecture and memory exploration framework. | Kasra Moazzemi, Chen-Ying Hsieh, Nikil D. Dutt |
| 2016 | Rapid SOC prototyping utilizing quilt packaging technology for modular functional IC partitioning. | Tian Lu, Carlos Ortega, Jason M. Kulick, G. H. Bernstein, Scott Ardisson, Rob Engelhardt |
| 2016 | Model-driven design & synthesis of the SHA-256 cryptographic hash function in rewire. | William L. Harrison, Adam M. Procter, Gerard Allwein |
| 2016 | EEGu2: an embedded device for brain/body signal acquisition and processing. | Shen Feng, Mian Tang, Fernando Quivira, Tim Dyson, Filip Cuckov, Gunar Schirner |
| 2016 | Inter-FPGA routing environment for performance exploration of multi-FPGA systems. | Umer Farooq, Roselyne Chotin-Avot, Muhammad Moazam Azeem, Maminionja Ravoson, Mariem Turki, Habib Mehrez |
| 2016 | A HW/SW embedded system for accelerating diagnosis of glaucoma from eye fundus images. | Paulo Cezar Dantas, Andrea Sarmento, Adriano Sarmento |
| 2016 | Architectural performance analysis of FPGA synthesized LEON processors. | Corentin Damman, Gregory Edison, Fabrice Guet, Eric Noulard, Luca Santinelli, Jrme Hugues |
| 2016 | Overloads in compositional embedded real-time control systems. | Akramul Azim |
| 2016 | Schedulability-guided exploration of multi-core systems. | Rabeh Ayari, Imane Hafnaoui, Giovanni Beltrame, Gabriela Nicolescu |
| 2016 | MORPh: mobile OLED power friendly camera system. | Xiang Chen, Jiachen Mao, Kent W. Nixon, Yiran Chen |
| 2016 | Efficient parallel multi-objective optimization for real-time systems software design exploration. | Rahma Bouaziz, Laurent Lemarchand, Frank Singhoff, Bechir Zalila, Mohamed Jmaiel |
| 2015 | Hard block reduction and synthesis improvements in Odin II. | Bo Yan, Kenneth B. Kent |
| 2015 | Application-specific memory protection policies for energy-efficient reliable design. | Sheng Yang, Rishad A. Shafik, S. Saqib Khursheed, David Flynn, Geoff V. Merrett, Bashir M. Al-Hashimi |