| 2024 | EBACA: Efficient Bfloat16-based Activation Function Implementation Using Enhanced CORDIC Architecture. | Vinay Rayapati, Sanampudi Gopala Krishna Reddy, Gandi Ajay Kumar, Gogireddy Ravi Kiran Reddy, Madhav Rao |
| 2024 | SpiCS-Net: Circuit Switched Network on Chip for Area-Efficient Spiking Recurrent Neural Networks. | Manu Rathore, Garrett S. Rose |
| 2024 | Harnessing Entropy: RRAM Crossbar-based Unified PUF and RNG. | Gokulnath Rajendran, Furqan Zahoor, Sidhaant Sachin Thakker, Simranjeet Singh, Farhad Merchant, Vikas Rana, Anupam Chattopadhyay |
| 2024 | CAD Tools Pathway in Hardware Security. | Sree Ranjani Rajendran, Farimah Farahmandi, Mark Tehranipoor |
| 2024 | A Low Power and Low Noise, Self Body Biased Low Noise Amplifier. | Jyoti Priya, Darshak Bhatt |
| 2024 | SDR-PUF: Sequence-Dependent Reconfigurable SRAM PUF with an Exponential CRP Space. | Kailash Prasad, Neel Shah, Jinay Dagli, Joycee Mekie |
| 2024 | Unlocking the Power of Machine Learning for Faster PCB Package and Board PDN Convergence. | Manoranjan Prasad, Santanu Kundu, Lennart Renker, Rakesh Ranjan |
| 2024 | Hybrid CMOS-Memristor Logic for Boosting the Power-Efficiency in Error Tolerant Applications. | Monika Pokharia, Kailash Prasad, Ravi S. Hegde, Joycee Mekie |
| 2024 | A 0.8V, Tri-State Inverter based SRAM Cell for SoC Applications. | Srujana Krishnamurthy Pillay |
| 2024 | DRL-based Multi-Stream Scheduling of Inference Pipelines on Edge Devices. | Danny Pereria, Sumana Ghosh, Soumyajit Dey |
| 2024 | COMPRIZE: Assessing the Fusion of Quantization and Compression on DNN Hardware Accelerators. | Vrajesh Patel, Neel Shah, Aravind Krishna, Tom Glint, Abdul Ronak, Joycee Mekie |
| 2024 | Vig-WaR: Vigilantly Watching Ransomware for Robust Trapping and Containment. | Akash Panzade, Deepak Kumar, Mahendra Rathor, Urbi Chatterjee |
| 2024 | SRIL: Securing Registers from Information Leakage at Register Transfer Level. | Priyanka Panigrahi, Vignesh Ravichandra Rao, Thockchom Birjit Singha, Chandan Karfa |
| 2024 | Thermal Crosstalk Analysis in ReRAM Passive Crossbar Arrays. | Shubham Pande, Bhaswar Chakrabarti, Anjan Chakravorty |
| 2024 | FPGA Specific Speed-Area Optimized Architectures of Arithmetic Cores with Scan Insertion for Carry Chain Based Multi-level Logic Implementation. | Ayan Palchaudhuri, Anindya Sundar Dhar |
| 2024 | MLESD: Machine Learning Assisted Faster On-Chip ESD Convergence Strategy. | Sashank Nishad, Santanu Kundu, Nicolas Richaud, S. Mallikarjun, Manoranjan Prasad, Lennart Renker |
| 2024 | Margin Propagation based Analog Soft-Gates for Probabilistic Computing. | Ankita Nandi, Pratik Kumar, Shantanu Chakrabartty, Chetan Singh Thakur |
| 2024 | Multiplierless In-filter Computing for tinyML Platforms. | Abhishek Ramdas Nair, Pallab Kumar Nath, Shantanu Chakrabartty, Chetan Singh Thakur |
| 2024 | A 0.8-V, 593-pA Trim-free Duty-cycled All CMOS Current Reference for Ultra-Low Power IoT Applications. | Chetan Mittal, Arnab Dey, Anubhab Banerjee, Ashfakh Ali, Zia Abbas |
| 2024 | A Compact Low-Power 29 Gb/s Pseudo Random Quaternary Sequence Generator in 65 nm CMOS. | Ishan Mishra, Ganpat Anant Parulekar, Shalabh Gupta |
| 2024 | Security Implications of Approximation: A Study of Trojan Attacks on Approximate Adders and Multipliers. | Vishesh Mishra, Sparsh Mittal, Nirbhay Mishra, Rekha Singhal |
| 2024 | Generation of Asymmetric Triangular Pulse by A Dispersion and Nonlinearity Engineered Silicon Core Optical Fiber. | Atrayee Mishra, Binoy Krishna Ghosh, Dipankar Ghosh, Mousumi Basu |
| 2024 | Power Integrity Analysis for Interoperability of BoW Chiplet Interfaces. | Ishan Mishra, Jayaprakash Balachandran, Wen-Sin Liew, Elad Alon, Srinivas Venkataraman, Shalabh Gupta |
| 2024 | Pattern Based Synthetic Benchmark Generation for Hardware Security Applications. | Juneet Kumar Meka, Satya AmarKant Marupureddy, Ranga Vemuri |
| 2024 | KiD: A Hardware Design Framework Targeting Unified NTT Multiplication for CRYSTALS-Kyber and CRYSTALS-Dilithium on FPGA. | Suraj Mandal, Debapriya Basu Roy |