| 1998 | Partial Reset Methodologies for Improving Random-Pattern Testability and BIST of Sequential Circuits. | Huy Nguyen, Rabindra K. Roy, Abhijit Chatterjee |
| 1998 | Finite State Machines: A Deeper Look into Synthesis Optimization for VHDL. | Vijay A. Nebhrajani, Nayan Suthar |
| 1998 | VLSI Implementation of a 300-MHz 0.35 um CMOS 32-bit Auto-Reloadable Binary Synchronous Counter with Optimal Test Overhead Delay. | S. K. Misra, R. K. Kolagotla, Hosahalli R. Srinivas, J. C. Mo, Marc S. Diamondstein |
| 1998 | Hardware/Software Co-design of a High-end Mixed Signal Microcontroller. | Pradeep K. Mishra, Somnath Paul, S. Venkataraman, Rajat Gupta |
| 1998 | Invited Address: A Wireless Portable Video-On-Demand System. | Teresa H. Meng |
| 1998 | Extensions to Programmable DSP architectures for Reduced Power Dissipation. | Mahesh Mehendale, Sunil D. Sherlekar, G. Venkatesh |
| 1998 | Algorithmic and Architectural Transformations for Low Power Realization of FIR Filters. | Mahesh Mehendale, Sunil D. Sherlekar, G. Venkatesh |
| 1998 | Coefficient Transformations for Area-Efficient Implementation of Multiplier-less FIR Filters. | Mahesh Mehendale, Somdipta Basu Roy, Sunil D. Sherlekar, G. Venkatesh |
| 1998 | Circuit Design using Resonant Tunneling Diodes. | Pinaki Mazumder, Shriram Kulkarni, Mayukh Bhattacharya, Alejandro F. Gonzlez |
| 1998 | Invited Address: Future Systems-on-a-Chip: Impact on Engineering Education. | Hugo De Man |
| 1998 | Partitioning VLSI Floorplans by Staircase Channels for Global Routing. | Subhashis Majumder, Subhas C. Nandy, Bhargab B. Bhattacharya |
| 1998 | Path Delay Testing: Variable-Clock Versus Rated-Clock. | Subhashis Majumder, Michael L. Bushnell, Vishwani D. Agrawal |
| 1998 | Tutorial: Delay Fault Models and Coverage. | Ananta K. Majhi, Vishwani D. Agrawal |
| 1998 | Mixed-Signal Test. | Ananta K. Majhi, Vishwani D. Agrawal |
| 1998 | Real Time Collision Detection and Avoidance: A Case Study for Design Space Exploration in HW-SW Codesign. | Sandeep K. Lodha, Shashank Gupta, M. Balakrishnan, Subhashis Banerjee |
| 1998 | A New Statistical Approach to Timing Analysis of VLSI Circuits. | Rung-Bin Lin, Meng-Chiou Wu |
| 1998 | MIX: A Test Generation System for Synchronous Sequential Circuits. | Xijiang Lin, Irith Pomeranz, Sudhakar M. Reddy |
| 1998 | Fast Arithmetic on Xilinx 5200 FPGA. | Bernard Laurent, Gilles Bosco, Gabriele Saucier |
| 1998 | A Power Management Methodology for High-Level Synthesis. | Ganesh Lakshminarayana, Anand Raghunathan, Niraj K. Jha, Sujit Dey |
| 1998 | Technique for Planning of Terminal Locations of Leaf Cells in Cell-Based Design with Routing Considerations. | Bharat Krishna, C. Y. Roger Chen, Naresh Sehgal |
| 1998 | Computation of Lower and Upper Bounds for Switching Activity: A Unified Approach. | Vamsi Krishna, Ramamurti Chandramouli, N. Ranganathan |
| 1998 | A Novel Translinear Principle Based BiMOS Transconductor. | S. Pradeep Kiran, K. Radhakrishna Rao |
| 1998 | Testability Preserving and Enhancing Transformations for Robust Delay Fault Testabilit. | Amey Karkare, Manoj Singla, Ajai Jain |
| 1998 | On Test Pattern Compaction Using Random Pattern Fault Simulation. | Seiji Kajihara, Kewal K. Saluja |
| 1998 | A Stochastic Method for Defect Level Analysis of Pseudorandom Testing. | Wen-Ben Jone, Sunil R. Das |