| 1998 | mproving Area Efficiency of FIR Filters Implemented Using Distributed Arithmetic. | Amit Sinha, Mahesh Mehendale |
| 1998 | Embedded Tutorial: Layout Driven Synthesis or Synthesis Driven Layout. | Naveed A. Sherwani, Prashant Sawkar |
| 1998 | A Pipelined Parallel Processor to Implement MD4 Message Digest Algorithm on Xilinx FPGA. | M. Bhaskar Sherigar, A. S. Mahadevan, K. Senthil Kumar, David S. Sumam |
| 1998 | Decomposition Strategies and their Performance in Fpga-Based Technology Mapping. | Henry Selvaraj, Miroslawa Nowicka, Tadeusz Luba |
| 1998 | Web-based Distributed VLSI Design. | Debashis Saha, Anantha P. Chandrakasan |
| 1998 | Partitioning sequential circuits for low power. | Sumit Roy, Prithviraj Banerjee, Majid Sarrafzadeh |
| 1998 | CFSMcharts: A New Language for Microprocessor Based system Design. | Partha S. Roop, Arcot Sowmya |
| 1998 | Synthesis of Testable RTL Designs. | C. P. Ravikumar, Sumit Gupta, Akshay Jajoo |
| 1998 | Controller Resynthesis for Testability Enhancement of RTL Controller/Data path Circuits. | Srivaths Ravi, Indradeep Ghosh, Rabindra K. Roy, Sujit Dey |
| 1998 | New Net Models for Spectral Netlist Partitioning. | P. S. Nagendra Rao, C. S. Jayathirtha, C. S. Raghavendra Prasad |
| 1998 | A Fast Two-level Logic Minimizer. | P. Srinivasa Rao, James Jacob |
| 1998 | A VLSI ATM Switch Architecture for VBR Traffic. | Nagarajan Ranganathan, Rajat Anand, Girish Chiruvolu |
| 1998 | Coding for Low-Power Address and Data Busses: A Source-Coding Framework and Applications. | Sumant Ramprasad, Naresh R. Shanbhag, Ibrahim N. Hajj |
| 1998 | Automatic Test Pattern Generation for Sequential Circuits Using Genetic Algorithms. | V. Rajesh, Ajai Jain |
| 1998 | Integration of High-Level Modeling, Formal Verification, and High-Level Synthesis in ATM Switch Design. | Sreeranga P. Rajan, Masahiro Fujita |
| 1998 | Distributed Logic Simulation Algorithm using Preemption of Inconsistent Events. | C. S. Raghu, S. Sundaram |
| 1998 | Invited Address: Hybrid Reconfigurable Processors - The Road to Low-Power Consumption. | Jan M. Rabaey |
| 1998 | Symbolic Analysis of Analog Integrated Circuits. | C. F. Prince, Vinita Vasudevan |
| 1998 | Simultaneous Scheduling, Binding and Floorplanning in High-level Synthesis. | Pradeep Prabhakaran, Prithviraj Banerjee |
| 1998 | On Test Compaction Objectives for Combinational and Sequential Circuits. | Irith Pomeranz, Sudhakar M. Reddy |
| 1998 | A Low Power Floating Point Accumulator. | R. V. K. Pillai, Asim J. Al-Khalili, Dhamin Al-Khalili |
| 1998 | Design of a Measurement and Interface Integrated Circuit for Characterization of Switched Current Memory Cells. | Adriano M. Pereira, Tales Cleber Pimenta, Robson L. Moreno, Edgar Charry R., Alberto M. Jorge |
| 1998 | Double Pass Transistor Logic for High Performance Wave Pipeline Circuits. | Rajesh S. Parthasarathy, Ramalingam Sridhar |
| 1998 | An Object-Oriented Concept for Intelligent Library Functions. | Johnny berg, Axel Jantsch, Anshul Kumar |
| 1998 | Current Mode Ternary D/A Converter. | Saeid Nooshabadi, G. S. Visweswaran, D. Nagchoudhuri |