| 2020 | A Multi-Agent Co-operative Model to Facilitate Criticality based Reliability for Mixed Critical Task Execution on FPGA based Cloud Environment. | Krishnendu Guha, Debasri Saha, Amlan Chakrabarti |
| 2020 | Message from the General Co-Chairs. | Sumit Goswami, Veeresh Shetty |
| 2020 | A Shared-Memory Parallel Implementation of the RePlAce Global Cell Placer. | Frdric Gessler, Philip Brisk, Mirjana Stojilovic |
| 2020 | Efficient Quantum Circuits for Square-Root and Inverse Square-Root. | Srijit Dutta, Yaswanth Tavva, Debjyoti Bhattacharjee, Anupam Chattopadhyay |
| 2020 | Leveraging Dynamic Partial Reconfiguration with Scalable ILP Based Task Scheduling. | Ashutosh Dhar, Mang Yu, Wei Zuo, Xiaohao Wang, Nam Sung Kim, Deming Chen |
| 2020 | A Mathematical Approach Towards Quantization of Floating Point Weights in Low Power Neural Networks. | Joydeep Kumar Devnath, Neelam Surana, Joycee Mekie |
| 2020 | A Design Optimization for Pin-Constrained Paper-based Digital Microfluidic Biochips Integrating Fluid-Control Co-Design Issues. | Piyali Datta, Arpan Chakraborty, Rajat Kumar Pal |
| 2020 | Intensifying Challenge Obfuscation by Cascading FPGA RO-PUFs for Random Number Generation. | Arjun Singh Chauhan, Vineet Sahula, A. S. Mandal, Abhigyan Dutta |
| 2020 | A 36dB Gain Range, 0.5dB Gain Step Variable Gain Amplifier with 10 to 25MHz Bandwidth Third-Order Filter for Portable Ultrasound Systems. | Purnendu Bhattaru, Nagendra Krishnapura |
| 2020 | Message from the Technical Program Co-Chairs. | David Atienza, Subhasish Mitra, Manan Suri |
| 2020 | Area and Energy Efficient Approximate Square Rooters for Error Resilient Applications. | Neelam Arya, Teena Soni, Manisha Pattanaik, G. K. Sharma |
| 2020 | On the Effect of Aging on Digital Sensors. | Md Toufiq Hasan Anik, Sylvain Guilley, Jean-Luc Danger, Naghmeh Karimi |
| 2020 | Message from the Tutorial Co-Chairs. | Amir Aminifar, Shabbir Batterywala |
| 2020 | Message from the Steering Committee Chair. | Vishwani D. Agrawal |
| 2020 | A Low Overhead Methodology for Validating Memory Consistency Models in Chip Multiprocessors. | Binod Kumar, Swapniel Thakur, Kanad Basu, Masahiro Fujita, Virendra Singh |
| 2020 | Analyzing Hardware Security Properties of Processors through Model Checking. | Binod Kumar, Akshay Kumar Jaiswal, V. S. Vineesh, Rushikesh Shinde |
| 2019 | Design of a Charge Sensitive Amplifier for Silicon Particle Detector in BCD 180 nm Process. | Indu Yadav, Ashish Joshi, Ettore Ruscino, Valentino Liberali, Attilio Andreazza, Hitesh Shrimali |
| 2019 | Ultra Low Energy Reduced Switching DAC for SAR ADC. | Japesh Vohra, Hande Vinayak Gopal |
| 2019 | An Efficient Design Approach for Implementation of 2 Bit Ternary Flash ADC Using Optimized Complementary TFET Devices. | Sanjay Vidhyadharan, Ramakant Ramakant, Abhay S. Vidhyadharan, A. Krishna Shyam, Mohit P. Hirpara, Surya Shankar Dan |
| 2019 | RTL Test Generation on Multi-core and Many-Core Architectures. | Aravind Krishnan Varadarajan, Michael Hsiao |
| 2019 | Multi-application Based Network-on-Chip Design for Mesh-of-Tree Topology Using Global Mapping and Reconfigurable Architecture. | Mohit Upadhyay, Monil Shah, P. Veda Bhanu, J. Soumya, Linga Reddy Cenkeramaddi |
| 2019 | Current DAC Based -40dB PSRR Configurable Output LDO in BCD Technology. | Vivek Tyagi, Vikas Rana, Laura Capecchi, Marcella Carissimi, Riccardo Zurla, Marco Pasotti |
| 2019 | Multidimensional Grid Aware Address Prediction for GPGPU. | Shivani Tripathy, Debiprasanna Sahoo, Manoranjan Satpathy |
| 2019 | Ultra Low Power Digital Front-End for Single Lead ECG Acquisition. | Sanket Thakkar, Biswajit Mishra |
| 2019 | An Efficient Memory Zeroization Technique Under Side-Channel Attacks. | Ankush Srivastava, Prokash Ghosh |