| 2018 | Rescheduling of Power Gating Instructions for Reduction of In-rush Current. | Sumanta Pyne |
| 2018 | Fault Tolerance in Network on Chip Using Bypass Path Establishing Packets. | Sharma Priya, Sukarn Agarwal, Hemangee K. Kapoor |
| 2018 | Positive Feedback Symmetric Adiabatic Logic Against Differential Power Attack. | Bhuvana B. P., V. S. Kanchana Bhaaskaran |
| 2018 | Parasitic Aware Automatic Analog CMOS Circuit Design Environment Using ABC Algorithm. | Subhash J. Patel, Rajesh Amratlal Thakker |
| 2018 | Overcoming Energy and Reliability Challenges for IoT and Mobile Devices with Data Analytics. | Sudeep Pasricha |
| 2018 | YaNoC: Yet Another Network-on-Chip Simulation Acceleration Engine Using FPGAs. | Khyamling Parane, Basavaraj Talawar, Prabhu B. M. Prasad |
| 2018 | A High-Performance and Area-Efficient VLSI Architecture for the PRESENT Lightweight Cipher. | Jai Gopal Pandey, Tarun Goel, Abhijit Karmakar |
| 2018 | Exploration of Loop Unroll Factors in High Level Synthesis. | Preeti Ranjan Panda, Namita Sharma, Srikanth Kurra, Khushboo Anil Bhartia, Neeraj Kumar Singh |
| 2018 | High Speed FPGA Fabric Aware CSD Recoding with Run-Time Support for Fault Localization. | Ayan Palchaudhuri, Anindya Sundar Dhar |
| 2018 | Hardware-Efficient and Wide-Band Frequency-Domain Energy Detector for Cognitive-Radio Wireless Network. | Mahesh S. Murty, Rahul Shrestha |
| 2018 | DPFair Scheduling with Slowdown and Suspension. | Sanjay Moulik, Arnab Sarkar, Hemangee K. Kapoor |
| 2018 | A Novel Tool for Synthesis by Direct Mapping of Asynchronous Circuits from Extended STG Specifications. | Felipe Mendes, Tiago S. Curtinhas, Duarte Lopes de Oliveira, Higor A. Delsoto, Lester de Abreu Faria |
| 2018 | Impact of Variations on Synchronizer Performance: An Experimental Study. | Joycee Mekie, Prashansa Mukim, Kimaya Kale |
| 2018 | Formal Methods for Coverage Analysis of Power Management Logic with Mixed-Signal Components. | Sudipa Mandal, Aritra Hazra, Pallab Dasgupta, Chunduri Rama Mohan |
| 2018 | Identification of Faulty TSVs in 3D IC During Pre-Bond Testing. | Dilip Kumar Maity, Surajit Kumar Roy, Chandan Giri |
| 2018 | A Quadrature-Phase Voltage Controlled Oscillator for Offset Phase and Frequency Compensation. | Pragya Maheshwari, Sadhu Pavan Kumar, Mukesh Deharia, Nandakumar Nambath, Shalabh Gupta |
| 2018 | Design Space Exploration of an Execution-Driven Functional Simulation Methodology. | Ipsita Biswas Mahapatra, Utkarsh Agarwal, Chandrashekhar Azad, S. K. Nandy |
| 2018 | Combined Inference and Satisfiability Based Methods for Complete Signal Restoration in Post-Silicon Validation. | Xiaobang Liu, Ranga Vemuri |
| 2018 | A Novel Zero Blind Zone Phase Frequency Detector for Fast Acquisition in Phase Locked Loops. | Sucheth S. Kuncham, Manasa Gadiyar, Sushmitha Din K., Kiran Kumar Lad, Tonse Laxminidhi |
| 2018 | A 0.6V Retention VMIN Ultra-Low Leakage High Density 6T SRAM in 40nm CMOS Technology Using Adaptive Source Bias. | Ashish Kumar, G. S. Visweswaran |
| 2018 | Switching-Time Dependent PUF Using STT-MRAM. | Ashwani Kumar, Shubham Sahay, Manan Suri |
| 2018 | A Temperature Compensated Read Assist for Low Vmin and High Performance High Density 6T SRAM in FinFET Technology. | Vinay Kumar, Ravindra kumar Shrivatava, Madhav Mansukh Padaliya |
| 2018 | Lightweight Forth Programmable NoCs. | Vinay B. Y. Kumar, Deval Shah, Mandar Datar, Sachin B. Patkar |
| 2018 | FPGA Implementation of Power Management Algorithm for Wind Energy Storage System with Kalman Filter MPPT Technique. | Vulisi Narendra Kumar, Gayadhar Panda |
| 2018 | A Systematic Approach to Determining the Weights of the Capacitors in the DAC of a Non-binary Redundant SAR ADCs. | Uma Mukund Kulkarni, Chetan D. Parikh, Subhajit Sen |