| 2018 | Modeling & Analysis of Redundancy Based Fault Tolerance for Permanent Faults in Chip Multiprocessor Cache. | Avishek Choudhury, Biplab K. Sikdar |
| 2018 | A 12.5Gbps Transmitter for Multi-standard SERDES in 40nm Low Leakage CMOS Process. | Biman Chattopadhyay, Sharath N. Bhat, Gopalkrishna Nayak, Ravi Mehta |
| 2018 | 2nd Order Sallen Key Switched Capacitor LPF with N-type Transistors. | Kamal Chapagai, Pydi Bahubalindruni, Nishtha |
| 2018 | Design Considerations of a Sub-50 Mu-W Receiver Front-end for Implantable Devices in MedRadio Band. | Gregory Chang, Shovan Maity, Baibhab Chatterjee, Shreyas Sen |
| 2018 | New Asymmetric Atomistic Model for the Analysis of Phase-Engineered MoS2-Gold Top Contact. | Richa Chakravarty, Dipankar Saha, Santanu Mahapatra |
| 2018 | Design Optimization at the Fluid-Level Synthesis for Safe and Low-Cost Droplet-Based Microfluidic Biochips. | Arpan Chakraborty, Piyali Datta, Rajat Kumar Pal |
| 2018 | Securing Module-Less Synthesis on Cyberphysical Digital Microfluidic Biochips from Malicious Intrusions. | Sarit Chakraborty, Chandan Das, Susanta Chakraborty |
| 2018 | Feedback Biasing Based Adjustable Gain Ultrasound Preamplifier for CMUTs in 45nm CMOS. | Linga Reddy Cenkeramaddi |
| 2018 | Online Detection and Reactive Countermeasure for Leakage from BPU Using TVLA. | Sarani Bhattacharya, Shivam Bhasin, Debdeep Mukhopadhyay |
| 2018 | An Efficient VLSI Architecture for Convolution Based DWT Using MAC. | Mohamed Asan Basiri M., Sk. Noor Mahammad |
| 2018 | A 0.29ps FOM Fast Transient any Cap Stable LVR in 28FDSOI. | Nitin Bansal, Saurabh Kumar Singh, Hemant Shukla, Madhvi Sharma |
| 2018 | An NMOS Low Drop-out Voltage Regulator with -17dB Wide-Band Power Supply Rejection for SerDes in 22FDX. | Nitin Bansal, Rahul Gupta |
| 2018 | Test-Time Reduction for Power-Aware 3D-SoC. | Sabyasachee Banerjee, Subhashis Majumder, Bhargab B. Bhattacharya |
| 2018 | Emerging FETs for Low Power and High Speed Embedded Dynamic Random Access Memory. | Md. Hasan Raza Ansari, Nupur Navlakha, Jyi-Tsong Lin, Abhinav Kranti |
| 2018 | Energy-Efficient Dynamic Data Encoding for Multi-level STT-MRAM. | Mohammad Gh. Alfailakawi, Imtiaz Ahmad, Sarah Elghandour |
| 2018 | Single-Error Hardened and Multiple-Error Tolerant Guarded Dual Modular Redundancy Technique. | Sai Aparna Aketi, Joycee Mekie, Hemal Shah |
| 2018 | An Ultra Low Power, 10-Bit Two-Step Flash ADC for Signal Processing Applications. | Mahesh Kumar Adimulam, Amit Kapoor, Sreehari Veeramachaneni, M. B. Srinivas |
| 2017 | Programmable Output Multi-phase Switched Capacitor Step-Up DC-DC Converter with SAR-based Regulation. | Mahesh Zanwar, Subhajit Sen |
| 2017 | High Accuracy, Multi-output Bandgap Reference Circuit in 16nm FinFet. | Sanjay Kumar Wadhwa, Nidhi Chaudhry |
| 2017 | DC Drain Current Model for Tunnel FETs Considering Source and Drain Depletion Regions. | Rajat Vishnoi, Pratyush Panday, Mamidala Jagadesh Kumar |
| 2017 | DTLB: Deterministic TLB for Tightly Bound Hard Real-Time Systems. | Kajal Varma, Geeta Patil, Biju K. Raveendran |
| 2017 | Dynamic Power Optimization Based on Formal Property Checking of Operations. | Shrinidhi Udupi, Joakim Urdahl, Dominik Stoffel, Wolfgang Kunz |
| 2017 | Migration Aware Low Overhead ERfair Scheduler. | Anshuman Tripathi, Arnab Sarkar, P. P. Chakrabarti |
| 2017 | A Low-Voltage 13T Latch-Type Sense Amplifier with Regenerative Feedback for Ultra Speed Memory Access. | Venkatesh Mani Tripathi, Sandeep Mishra, Jyotishman Saikia, Anup Dandapat |
| 2017 | DyPhase: A Dynamic Phase Change Memory Architecture with Symmetric Write Latency. | Ishan G. Thakkar, Sudeep Pasricha |