| 2006 | An Area Efficient Mixed-Signal Test Architecture for Systems-on-a-Chip. | Hari Vijay Venkatanarayanan, Michael L. Bushnell |
| 2006 | Efficient Techniques for Noise Characterization of Sequential Cells and Macros. | Venkat Rao Vallapenani, Ravi Shankar Chevuri, Bingxiong Xu, Lun Ye, Kanad Chakraborty |
| 2006 | Fast DC Analysis and Its Application to Combinatorial Optimization Problems. | Gaurav Trivedi, Madhav P. Desai, H. Narayanan |
| 2006 | Apriori Formal Coverage Analysis for Protocol Properties. | Praveen Tiwari, Saptarshi Biswas, Raj S. Mitra |
| 2006 | Novel BCD Adders and Their Reversible Logic Implementation for IEEE 754r Format. | Himanshu Thapliyal, Saurabh Kotiyal, M. B. Srinivas |
| 2006 | A Novel Architecture Using the Decorrelating Transform for Low Power Adaptive Filters. | Mark P. Tennant, Ahmet T. Erdogan, Tughrul Arslan, John S. Thompson |
| 2006 | An On-Chip Diagnosis Methodology for Embedded Cores with Replaceable Modules. | Ramesh C. Tekumalla |
| 2006 | Beyond RTL: Advanced Digital System Design. | Shiv Tasker, Rishiyur S. Nikhil |
| 2006 | Optimization of Global Interconnects in High Performance VLSI Circuits. | Min Tang, Jun-Fa Mao |
| 2006 | Threshold Trimming Based Design of a CMOS Programmable Operational Amplifier. | Roopak Suri, C. M. Markan |
| 2006 | Hybrid Custom Instruction and Co-Processor Synthesis Methodology for Extensible Processors. | Fei Sun, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha |
| 2006 | High Speed Robust Current Sense Amplifier for Nanoscale Memories: - A Winner Take All Approach. | Srikanth Sundaram, Praveen Elakkumanan, Ramalingam Sridhar |
| 2006 | All-Printed RFID Tags: Materials, Devices, and Circuit Implications. | Vivek Subramanian, Paul C. Chang, Daniel C. Huang, Josephine B. Lee, Steven E. Molesa, David R. Redinger, Steven K. Volkman |
| 2006 | Custom Reconfigurable Architecture for Autonomous Fault-Recovery of MEMS Vibratory Sensor Electronics. | Evangelos F. Stefatos, Tughrul Arslan, Didier Keymeulen, Ian Ferguson |
| 2006 | Hybrid CMOS/Molecular Electronic Circuits. | Mircea R. Stan, Garrett S. Rose, Matthew M. Ziegler |
| 2006 | Gate Delay Modeling with Multiple Input Switching for Static (Statistical) Timing Analysis. | Jayashree Sridharan, Tom Chen |
| 2006 | Gate-Induced Barrier Field Effect Transistor (GBFET) - A New Thin Film Transistor for Active Matrix Liquid Crystal Display Systems. | Jayakumaran Sivagnaname, Hung C. Ngo, Kevin J. Nowka, Robert K. Montoye, Richard B. Brown |
| 2006 | Programmable LDPC Decoder Based on the Bubble-Sort Algorithm. | Rohit Singhal, Gwan S. Choi, Rabi N. Mahapatra |
| 2006 | Efficient and Accurate EMC Analysis of High-Frequency VLSI Subnetworks. | Gurpreet Shinh, Natalie Nakhla, Ramachandra Achar, Michel S. Nakhla, Ihsan Erdin |
| 2006 | CMOS Integrated Circuit for Sensing Applications. | Supriya S. Shanbhag |
| 2006 | Future FPGA Technologies, in Partnership with Universities. | Richard Sevcik |
| 2006 | Ultra Folded High-Speed Architectures for Reed-Solomon Decoders. | Kavish Seth, K. N. Viswajith, S. Srinivasan, V. Kamakoti |
| 2006 | Frame Based Fair Multiprocessor Scheduler: A Fast Fair Algorithm for Real-Time Embedded Systems. | Arnab Sarkar, P. P. Chakrabarti, Rajeev Kumar |
| 2006 | Circuit Compatible Macromodeling of High-Speed VLSI Modules Characterized by Scattering Parameters. | Dharmendra Saraswat, Ramachandra Achar, Michel S. Nakhla |
| 2006 | Performance Optimization with Scalable Reconfigurable Computing Systems. | Rama Sangireddy, Prabhu Rajamani, Shwetha Gaddam |