Synthesis of Floating-Point Addition Clusters on FPGAs Using Carry-Save Arithmetic.
Amit Verma, Ajay Kumar Verma, Hadi Parandeh-Afshar, Philip Brisk, Paolo Ienne
Browse the full FPL paper archive.
Amit Verma, Ajay Kumar Verma, Hadi Parandeh-Afshar, Philip Brisk, Paolo Ienne
Browse the full FPL paper archive.