| 2026 | ASPDAC | PrometheusFree: Concurrent Detection of Laser Fault Injection Attacks in Optical Neural Networks. | Kota Nishida, Yoshihiro Midoh, Noriyuki Miura, Satoshi Kawakami, Alex Orailoglu, Jun Shiomi |
| 2025 | ASPDAC | White-box logic obfuscation: A Transparent Solution to Hardware Piracy and Reverse Engineering. | Leon Li, Alex Orailoglu |
| 2024 | ETS | Transcoders: A Better Alternative To Denoising Autoencoders. | Pushpak Raj Gautam, Alex Orailoglu |
| 2024 | ITC | Locked-by-Design: Enhancing White-box Logic Obfuscation with Effective Key Mutation. | Leon Li, Alex Orailoglu |
| 2023 | VTS | Thwarting Reverse Engineering Attacks through Keyless Logic Obfuscation. | Leon Li, Alex Orailoglu |
| 2022 | DATE | JANUS-HD: Exploiting FSM Sequentiality and Synthesis Flexibility in Logic Obfuscation to Thwart SAT Attack While Offering Strong Corruption. | Leon Li, Alex Orailoglu |
| 2021 | ICCAD | Evolving Complementary Sparsity Patterns for Hardware-Friendly Inference of Sparse DNNs. | Elbruz Ozen, Alex Orailoglu |
| 2020 | ASPDAC | Concurrent Monitoring of Operational Health in Neural Networks Through Balanced Output Partitions. | Elbruz Ozen, Alex Orailoglu |
| 2020 | CCS | Hunting Sybils in Participatory Mobile Consensus-Based Networks. | Nickolai Verchok, Alex Orailoglu |
| 2020 | DATE | Test Pattern Superposition to Detect Hardware Trojans. | Chris Nigh, Alex Orailoglu |
| 2020 | ICCAD | Just Say Zero: Containing Critical Bit-Error Propagation in Deep Neural Networks With Anomalous Feature Suppression. | Elbruz Ozen, Alex Orailoglu |
| 2020 | ICCAD | A Crowd-Based Explosive Detection System with Two-Level Feedback Sensor Calibration. | Chengmo Yang, Patrick Cronin, Agamyrat Agambayev, Sule Ozev, A. Enis etin, Alex Orailoglu |
| 2020 | VTS | Taming Combinational Trojan Detection Challenges with Self-Referencing Adaptive Test Patterns. | Chris Nigh, Alex Orailoglu |
| 2019 | DATE | Piercing Logic Locking Keys through Redundancy Identification. | Leon Li, Alex Orailoglu |
| 2019 | ICASSP | Detecting Gas Vapor Leaks through Uncalibrated Sensor Based CPS. | Diaa Badawi, Sule Ozev, Jennifer Blain Christen, Chengmo Yang, Alex Orailoglu, A. Enis etin |
| 2019 | VTS | Shielding Logic Locking from Redundancy Attacks. | Leon Li, Alex Orailoglu |
| 2018 | ITC | Variation-Aware Hardware Trojan Detection through Power Side-channel. | Fakir Sharif Hossain, Michihiro Shintani, Michiko Inoue, Alex Orailoglu |
| 2017 | ASPDAC | Ensuring system security through proximity based authentication. | Joshua Marxen, Alex Orailoglu |
| 2017 | ETS | Detecting hardware Trojans without a Golden IC through clock-tree defined circuit partitions. | Fakir Sharif Hossain, Tomokazu Yoneda, Michiko Inoue, Alex Orailoglu |
| 2015 | ICCD | Mobile ecosystem driven application-specific low-power control microarchitecture. | Garo Bournoutian, Alex Orailoglu |
| 2014 | DATE | On-device objective-C application optimization framework for high-performance mobile processors. | Garo Bournoutian, Alex Orailoglu |
| 2014 | ISLPED | Sleep-aware variable partitioning for energy-efficient hybrid PRAM and DRAM main memory. | Chenchen Fu, Mengying Zhao, Chun Jason Xue, Alex Orailoglu |
| 2013 | ASPDAC | Full exploitation of process variation space for continuous delivery of optimal delay test quality. | Baris Arslan, Alex Orailoglu |
| 2013 | DATE | Profit maximization through process variation aware high level synthesis with speed binning. | Mengying Zhao, Alex Orailoglu, Chun Jason Xue |
| 2013 | VTS | Tracing the best test mix through multi-variate quality tracking. | Baris Arslan, Alex Orailoglu |
| 2013 | VTS | Towards a cost-effective hardware trojan detection methodology. | Raymond Paseman, Alex Orailoglu |
| 2013 | RTCSA | Branch Prediction directed Dynamic instruction Cache Locking for embedded systems. | Keni Qiu, Mengying Zhao, Chun Jason Xue, Alex Orailoglu |
| 2012 | VTS | Delay test resource allocation and scheduling for multiple frequency domains. | Baris Arslan, Alex Orailoglu |
| 2012 | VTS | Small-delay defects detection under process variation using Inter-Path Correlation. | Francisco J. Galarza-Medina, Jose Luis Garcia-Gervacio, Vctor H. Champac, Alex Orailoglu |
| 2011 | DAC | Diagnosing scan clock delay faults through statistical timing pruning. | Mingjing Chen, Alex Orailoglu |
| 2011 | DATE | Adaptive test optimization through real time learning of test effectiveness. | Baris Arslan, Alex Orailoglu |
| 2011 | DATE | Diagnosing scan chain timing faults through statistical feature analysis of scan images. | Mingjing Chen, Alex Orailoglu |
| 2011 | DATE | Register allocation for simultaneous reduction of energy and peak temperature on registers. | Tiantian Liu, Alex Orailoglu, Chun Jason Xue, Minming Li |
| 2011 | DATE | Frugal but flexible multicore topologies in support of resource variation-driven adaptivity. | Chengmo Yang, Alex Orailoglu |
| 2010 | DATE | Cost-effective IR-drop failure identification and yield recovery through a failure-adaptive test scheme. | Mingjing Chen, Alex Orailoglu |
| 2010 | ICCD | Delay test quality maximization through process-aware selection of test set size. | Baris Arslan, Alex Orailoglu |
| 2010 | VTS | VDDmin test optimization for overscreening minimization through adaptive scan chain masking. | Mingjing Chen, Alex Orailoglu |
| 2009 | CASES | Reducing impact of cache miss stalls in embedded systems by extracting guaranteed independent instructions. | Garo Bournoutian, Alex Orailoglu |
| 2009 | DATE | Making DNA self-assembly error-proof: Attaining small growth error rates through embedded information redundancy. | Saturnino Garcia, Alex Orailoglu |
| 2009 | DATE | Towards no-cost adaptive MPSoC static schedules through exploitation of logical-to-physical core mapping latitude. | Chengmo Yang, Alex Orailoglu |
| 2009 | DSN | Processor reliability enhancement through compiler-directed register file peak temperature reduction. | Chengmo Yang, Alex Orailoglu |
| 2009 | ICCAD | Scan power reduction in linear test data compression scheme. | Mingjing Chen, Alex Orailoglu |
| 2008 | CASES | A light-weight cache-based fault detection and checkpointing scheme for MPSoCs enabling relaxed execution synchronization. | Chengmo Yang, Alex Orailoglu |
| 2008 | DAC | Miss reduction in embedded processors through dynamic, power-friendly cache design. | Garo Bournoutian, Alex Orailoglu |
| 2008 | DATE | Towards fault tolerant parallel prefix adders in nanoelectronic systems. | Wenjing Rao, Alex Orailoglu |
| 2008 | ICCD | Test cost minimization through adaptive test development. | Mingjing Chen, Alex Orailoglu |
| 2007 | ASPDAC | Core-Based Testing of Multiprocessor System-on-Chips Utilizing Hierarchical Functional Buses. | Fawnizu Azmadi Hussin, Tomokazu Yoneda, Alex Orailoglu, Hideo Fujiwara |
| 2007 | CASES | Light-weight synchronization for inter-processor communication acceleration on embedded MPSoCs. | Chengmo Yang, Alex Orailoglu |
| 2007 | DATE | Interactive presentation: Logic level fault tolerance approaches targeting nanoelectronics PLAs. | Wenjing Rao, Alex Orailoglu, Ramesh Karri |
| 2007 | DSN | Fault Tolerant Approaches to Nanoelectronic Programmable Logic Arrays. | Wenjing Rao, Alex Orailoglu, Ramesh Karri |
| 2007 | ICCD | Power efficient register file update approach for embedded processors. | Raid Ayoub, Alex Orailoglu |
| 2007 | ICCD | Circuit-level mismatch modelling and yield optimization for CMOS analog circuits. | Mingjing Chen, Alex Orailoglu |
| 2006 | CASES | Power efficient branch prediction through early identification of branch addresses. | Chengmo Yang, Alex Orailoglu |
| 2006 | DAC | Topology aware mapping of logic functions onto nanowire-based crossbar architectures. | Wenjing Rao, Alex Orailoglu, Ramesh Karri |
| 2006 | ETS | Fault Identification in Reconfigurable Carry Lookahead Adders Targeting Nanoelectronic Fabrics. | Wenjing Rao, Alex Orailoglu, Ramesh Karri |
| 2006 | ICCD | Power-Constrained SOC Test Schedules through Utilization of Functional Buses. | Fawnizu Azmadi Hussin, Tomokazu Yoneda, Alex Orailoglu, Hideo Fujiwara |
| 2006 | VTS | Decision Tree Based Mismatch Diagnosis in Analog Circuits. | Mingjing Chen, Hosam Haggag, Alex Orailoglu |
| 2006 | VTS | Nanofabric Topologies and Reconfiguration Algorithms to Support Dynamically Adaptive Fault Tolerance. | Wenjing Rao, Alex Orailoglu, Ramesh Karri |
| 2005 | ASPDAC | A unified transformational approach for reductions in fault vulnerability, power, and crosstalk noise & delay on processor buses. | Raid Ayoub, Alex Orailoglu |
| 2005 | ASPDAC | Fault tolerant nanoelectronic processor architectures. | Wenjing Rao, Alex Orailoglu, Ramesh Karri |
| 2005 | ASPDAC | Forward discrete probability propagation method for device performance characterization under process variations. | Rasit Onur Topaloglu, Alex Orailoglu |
| 2005 | ASPDAC | Fault tolerant quantum cellular array (QCA) design using Triple Modular Redundancy with shifted operands. | Tongquan Wei, Kaijie Wu, Ramesh Karri, Alex Orailoglu |
| 2005 | DAC | Energy-effcient physically tagged caches for embedded processors with virtual memory. | Peter Petrov, Daniel Tracy, Alex Orailoglu |
| 2005 | DAC | A DFT approach for diagnosis and process variation-aware structural test of thermometer coded current steering DACs. | Rasit Onur Topaloglu, Alex Orailoglu |
| 2005 | ICCD | Architectural-Level Fault Tolerant Computation in Nanoelectronic Processors. | Wenjing Rao, Alex Orailoglu, Ramesh Karri |
| 2004 | ASPDAC | Efficient RT-level fault diagnosis methodology. | Ozgur Sinanoglu, Alex Orailoglu |
| 2004 | ASPDAC | On mismatch in the deep sub-micron era - from physics to circuits. | Rasit Onur Topaloglu, Alex Orailoglu |
| 2004 | DATE | CircularScan: A Scan Architecture for Test Cost Reduction. | Baris Arslan, Alex Orailoglu |
| 2004 | DATE | Scan Power Minimization through Stimulus and Response Transformations. | Ozgur Sinanoglu, Alex Orailoglu |
| 2004 | ETS | Pipelined test of SOC cores through test data transformations. | Ozgur Sinanoglu, Alex Orailoglu |
| 2004 | ICCAD | Design space exploration for aggressive test cost reduction in CircularScan architectures. | Baris Arslan, Alex Orailoglu |
| 2004 | ICCAD | Frugal linear network-based test decompression for drastic test cost reductions. | Wenjing Rao, Alex Orailoglu, George Su |
| 2004 | ICCD | Extending the Applicability of Parallel-Serial Scan Designs. | Baris Arslan, Ozgur Sinanoglu, Alex Orailoglu |
| 2004 | ICCD | End-to-End Testability Analysis and DfT Insertion for Mixed-Signal Paths. | Sule Ozev, Alex Orailoglu |
| 2004 | ITC | Test Cost Reduction Through A Reconfigurable Scan Architecture. | Baris Arslan, Alex Orailoglu |
| 2004 | ITC | Fault Tolerant Arithmetic with Applications in Nanotechnology based Systems. | Wenjing Rao, Alex Orailoglu, Ramesh Karri |
| 2004 | ITC | Autonomous Yet Deterministic Test of SOC Cores. | Ozgur Sinanoglu, Alex Orailoglu |
| 2003 | DAC | Test application time and volume compression through seed overlapping. | Wenjing Rao, Ismet Bayraktaroglu, Alex Orailoglu |
| 2003 | DATE | Power Efficiency through Application-Specific Instruction Memory Transformations. | Peter Petrov, Alex Orailoglu |
| 2003 | DATE | Virtual Compression through Test Vector Stitching for Scan Based Designs. | Wenjing Rao, Alex Orailoglu |
| 2003 | DSD | Customizable Embedded Processor Architectures. | Peter Petrov, Alex Orailoglu |
| 2003 | DSD | Low-power Branch Target Buffer for Application-Specific Embedded Processors. | Peter Petrov, Alex Orailoglu |
| 2003 | DSD | Hierarchical Constraint Conscious RT-level Test Generation. | Ozgur Sinanoglu, Alex Orailoglu |
| 2003 | ETS | Parity-based output compaction for core-based SOCs [logic testing]. | Ozgur Sinanoglu, Alex Orailoglu |
| 2003 | ICCAD | Compiler-Based Register Name Adjustment for Low-Power Embedded Processors. | Peter Petrov, Alex Orailoglu |
| 2003 | ICCAD | Partial Core Encryption for Performance-Efficient Test of SOCs. | Ozgur Sinanoglu, Alex Orailoglu |
| 2003 | ICCD | Virtual Page Tag Reduction for Low-power TLBs. | Peter Petrov, Alex Orailoglu |
| 2003 | ICCD | Aggressive Test Power Reduction Through Test Stimuli Transformation. | Ozgur Sinanoglu, Alex Orailoglu |
| 2003 | ITC | Modeling Scan Chain Modifications For Scan-in Test Power Minimization. | Ozgur Sinanoglu, Alex Orailoglu |
| 2003 | VTS | Decompression Hardware Determination for Test Volume and Time Reduction through Unified Test Pattern Compaction and Compression. | Ismet Bayraktaroglu, Alex Orailoglu |
| 2002 | DATE | Gate Level Fault Diagnosis in Scan-Based BIST. | Ismet Bayraktaroglu, Alex Orailoglu |
| 2002 | DATE | Test Planning and Design Space Exploration in a Core-Based Environment. | rika F. Cota, Luigi Carro, Marcelo Lubaszewski, Alex Orailoglu |
| 2002 | DATE | Power Efficient Embedded Processor Ip's through Application-Specific Tag Compression in Data Caches. | Peter Petrov, Alex Orailoglu |
| 2002 | DATE | Reducing Test Application Time Through Test Data Mutation Encoding. | Sherief Reda, Alex Orailoglu |
| 2002 | ETS | Dynamic test data transformations for average and peak power reductions. | Ozgur Sinanoglu, Ismet Bayraktaroglu, Alex Orailoglu |
| 2002 | ICCAD | A novel scan architecture for power-efficient, rapid test. | Ozgur Sinanoglu, Alex Orailoglu |
| 2002 | ICCD | Fault Dictionary Size Reduction through Test Response Superposition. | Baris Arslan, Alex Orailoglu |
| 2002 | ICCD | Cost-Effective Concurrent Test Hardware Design for Linear Analog Circuits. | Sule Ozev, Alex Orailoglu |
| 2002 | ISCAS | Automated test development and test time reduction for RF subsystems. | Sule Ozev, Alex Orailoglu, Hosam Haggag |
| 2002 | ITC | Scan Power Reduction Through Test Data Transition Frequency Analysis. | Ozgur Sinanoglu, Ismet Bayraktaroglu, Alex Orailoglu |
| 2002 | VTS | Boosting the Accuracy of Analog Test Coverage Computation through Statistical Tolerance Analysis. | Sule Ozev, Alex Orailoglu |
| 2002 | VTS | Test Power Reduction through Minimization of Scan Chain Transitions. | Ozgur Sinanoglu, Ismet Bayraktaroglu, Alex Orailoglu |
| 2001 | DAC | Test Volume and Application Time Reduction Through Scan Chain Concealment. | Ismet Bayraktaroglu, Alex Orailoglu |
| 2001 | DAC | Speeding Up Control-Dominated Applications through Microarchitectural Customizations in Embedded Processors. | Peter Petrov, Alex Orailoglu |
| 2001 | DATE | Diagnosis for scan-based BIST: reaching deep into the signatures. | Ismet Bayraktaroglu, Alex Orailoglu |
| 2001 | ITC | Testability implications in low-cost integrated radio transceivers: a Bluetooth case study. | Christian Olgaard, Sule Ozev, Alex Orailoglu |
| 2001 | ITC | Space and time compaction schemes for embedded cores. | Ozgur Sinanoglu, Alex Orailoglu |
| 2001 | VTS | Efficient Transparency Extraction and Utilization in Hierarchical Test. | Yiorgos Makris, Vishal Patel, Alex Orailoglu |
| 2001 | VTS | RT-level Fault Simulation Based on Symbolic Propagation. | Ozgur Sinanoglu, Alex Orailoglu |
| 2000 | DAC | Improved fault diagnosis in scan-based BIST via superposition. | Ismet Bayraktaroglu, Alex Orailoglu |
| 2000 | DATE | Test Quality and Fault Risk in Digital Filter Datapath BIST. | Laurence Goodby, Alex Orailoglu |
| 2000 | DATE | Test Synthesis for Mixed-Signal SOC Paths. | Sule Ozev, Ismet Bayraktaroglu, Alex Orailoglu |
| 2000 | ETS | Low cost concurrent test implementation for linear digital systems. | Ismet Bayraktaroglu, Alex Orailoglu |
| 2000 | ETS | How to avoid random walks in hierarchical test path identification. | Yiorgos Makris, Jamison Collins, Alex Orailoglu |
| 2000 | ICASSP | Cost effective digital filter design for concurrent test. | Ismet Bayraktaroglu, Alex Orailoglu |
| 2000 | ISCAS | Unifying methodologies for high fault coverage concurrent and off-line test of digital filters. | Ismet Bayraktaroglu, Alex Orailoglu |
| 2000 | ISCAS | Transparency-based hierarchical test generation for modular RTL designs. | Yiorgos Makris, Jamison Collins, Alex Orailoglu, Praveen Vishakantaiah |
| 2000 | ITC | Deterministic partitioning techniques for fault diagnosis in scan-based BIST. | Ismet Bayraktaroglu, Alex Orailoglu |
| 2000 | VTS | Invariance-Based On-Line Test for RTL Controller-Datapath Circuits. | Yiorgos Makris, Ismet Bayraktaroglu, Alex Orailoglu |
| 2000 | VTS | Test Selection Based on High Level Fault Simulation for Mixed-Signal Systems. | Sule Ozev, Alex Orailoglu |
| 1999 | DATE | Self Recovering Controller and Datapath Codesign. | Samuel Norman Hamilton, Alex Orailoglu, Andre Hertwig |
| 1999 | DATE | Channel-Based Behavioral Test Synthesis for Improved Module Reachability. | Yiorgos Makris, Alex Orailoglu |
| 1999 | VTS | Low-Cost On-Line Test for Digital Filters. | Ismet Bayraktaroglu, Alex Orailoglu |
| 1998 | DATE | Concurrent Error Recovery with Near-Zero Latency in Synthesized ASICs. | Samuel Norman Hamilton, Alex Orailoglu |
| 1998 | ITC | DFT guidance through RTL test justification and propagation analysis. | Yiorgos Makris, Alex Orailoglu |
| 1997 | DAC | Frequency-Domain Compatibility in Digital Filter BIST. | Laurence Goodby, Alex Orailoglu |
| 1996 | DAC | Pseudorandom-Pattern Test Resistance in High-Performance DSP Datapaths. | Laurence Goodby, Alex Orailoglu |
| 1996 | DATE | High-level synthesis of gracefully degradable ASICs. | Wah Chan, Alex Orailoglu |
| 1996 | ICASSP | Variance mismatch: identifying random-test resistance in DSP datapaths. | Laurence Goodby, Alex Orailoglu |
| 1996 | ICCD | Microarchitectural synthesis of gracefully degradable, dynamically reconfigurable ASICs. | Alex Orailoglu |
| 1996 | VTS | Can Defect-Tolerant Chips Better Meet the Quality Challenge? | R. L. Campbell, P. Kuekes, David Y. Lepejian, Wojciech P. Maly, Michael Nicolaidis, Alex Orailoglu |
| 1995 | ITC | Towards 100% Testable FIR Digital Filters. | Laurence Goodby, Alex Orailoglu |
| 1995 | VTS | Testability metrics for synthesis of self-testable designs and effective test plans. | Mahsa Vahidi, Alex Orailoglu |
| 1994 | DAC | Microarchitectural Synthesis of VLSI Designs with High Test Concurrency. | Ian G. Harris, Alex Orailoglu |
| 1994 | DAC | Area-Efficient Fault Detection During Self-Recovering Microarchitecture Synthesis. | Ramesh Karri, Alex Orailoglu |
| 1994 | ICCD | Microarchitectural Synthesis of Performance-Constrained, Low-Power VLSI Designs. | Laurence Goodby, Alex Orailoglu, Paul M. Chau |
| 1994 | ICCD | SYNCBIST: SYNthesis for Concurrent Built-In-Self-Testability. | Ian G. Harris, Alex Orailoglu |
| 1994 | ICCD | Integrating Binding Constraints in the Synthesis of Area-Efficient Self-Recovering Microarchitectures. | Karin Hgstedt, Alex Orailoglu |
| 1993 | DAC | High-Level Synthesis of Fault-Secure Microarchitectures. | Ramesh Karri, Alex Orailoglu |
| 1993 | ICCD | Test Path Generation and Test Scheduling for Self-Testable Designs. | Alex Orailoglu, Ian G. Harris |
| 1993 | ISCAS | Intertwined Scheduling, Module Selection and Allocation in Time-and-Area. | Ian G. Harris, Alex Orailoglu |
| 1992 | DAC | Transformation-Based High-Level Synthesis of Fault-Tolerant ASICs. | Ramesh Karri, Alex Orailoglu |
| 1992 | ICCD | High-Level Synthesis of Self-Recovering MicroArchitectures. | Alex Orailoglu, Ramesh Karri |
| 1991 | MICRO | ALPS: An Algorithm for Pipeline Data Path Synthesis. | Ramesh Karri, Alex Orailoglu |
| 1986 | DAC | Flow graph representation. | Alex Orailoglu, Daniel Gajski |