| 2017 | DAC | Advances in Formal Methods for the Design of Analog/Mixed-Signal Systems: Invited. | Vladimir Dubikhin, Chris J. Myers, Danil Sokolov, Ioannis Syranidis, Alexandre Yakovlev |
| 2016 | FDL | Selective abstraction and stochastic methods for scalable power modelling of heterogeneous systems. | Ashur Rafiev, Fei Xia, Alexei Iliasov, Rem Gensh, Ali Aalsaud, Alexander B. Romanovsky, Alexandre Yakovlev |
| 2015 | DATE | GALS synthesis and verification for xMAS models. | Frank P. Burns, Danil Sokolov, Alexandre Yakovlev |
| 2015 | DATE | Mixed wire and surface-wave communication fabrics for decentralized on-chip multicasting. | Ammar Karkar, Kin-Fai Tong, Terrence S. T. Mak, Alexandre Yakovlev |
| 2015 | PDP | A Formal Specification and Prototyping Language for Multi-core System Management. | Alexei Iliasov, Ashur Rafiev, Fei Xia, Rem Gensh, Alexander B. Romanovsky, Alexandre Yakovlev |
| 2014 | DATE | ArchOn: Architecture-open Resource-driven Cross-layer Modelling Framework. | Ashur Rafiev, Alexei Iliasov, Alexander B. Romanovsky, Andrey Mokhov, Fei Xia, Alexandre Yakovlev |
| 2014 | FPL | Asynchronously assisted FPGA for variability. | Hock Soon Low, Delong Shang, Fei Xia, Alexandre Yakovlev |
| 2012 | IOLTS | Error detection and correction of single event upset (SEU) tolerant latch. | Norhuzaimin Julai, Alexandre Yakovlev, Alexandre V. Bystrov |
| 2011 | DATE | Run-time deadlock detection in networks-on-chip using coupled transitive closure networks. | Ra'ed Al-Dujaily, Terrence S. T. Mak, Fei Xia, Alexandre Yakovlev, Maurizio Palesi |
| 2011 | FPGA | Variation tolerant asynchronous FPGA (abstract only). | Hock Soon Low, Delong Shang, Fei Xia, Alexandre Yakovlev |
| 2010 | FPL | A Reconfigurable Hebbian Eigenfilter for Neurophysiological Spike Train Analysis. | Bo Yu, Terrence S. T. Mak, Xiangyu Li, Fei Xia, Alexandre Yakovlev, Yihe Sun, Chi-Sang Poon |
| 2010 | ISCAS | Stochastic analysis of power, latency and the degree of concurrency. | Yuan Chen, Isi Mitrani, Delong Shang, Fei Xia, Alexandre Yakovlev |
| 2010 | ISCAS | Asynchronous FPGA architecture with distributed control. | Delong Shang, Fei Xia, Alexandre Yakovlev |
| 2010 | ISCAS | Highly parallel multi-resource arbiters. | Delong Shang, Fei Xia, Alexandre Yakovlev |
| 2008 | DATE | Bandwidth-Centric Optimisation for Area-Constrained Links with Crosstalk Avoidance Methods. | Basel Halak, Alexandre Yakovlev |
| 2008 | DATE | Conditional Partial Order Graphs and Dynamically Reconfigurable Control Synthesis. | Andrey Mokhov, Alexandre Yakovlev |
| 2008 | DATE | Serialized Asynchronous Links for NoC. | Simon Ogg, Enrico Valli, Bashir M. Al-Hashimi, Alexandre Yakovlev, Crescenzo D'Alessandro, Luca Benini |
| 2008 | ICCD | Conversion driven design of binary to mixed radix circuits. | Ashur Rafiev, Julian P. Murphy, Danil Sokolov, Alexandre Yakovlev |
| 2007 | IOLTS | A C-element Latch Scheme with Increased Transient Fault Tolerance for Asynchronous Circuits. | K. T. Gardiner, Alexandre Yakovlev, Alexandre V. Bystrov |
| 2007 | ISCAS | Impact of strain on the design of low-power high-speed circuits. | Hiran Ramakrishnan, Koushik Maharatna, Sanatan Chattopadhyay, Alexandre Yakovlev |
| 2006 | ETS | Low-Cost Online Testing of Asynchronous Handshakes. | Delong Shang, Alexandre Yakovlev, Frank P. Burns, Fei Xia, Alexandre V. Bystrov |
| 2006 | ICCAD | Cost-aware synthesis of asynchronous circuits based on partial acknowledgement. | Yu Zhou, Danil Sokolov, Alexandre Yakovlev |
| 2006 | IOLTS | Online Testing by Protocol Decomposition. | Deepali Koppad, Danil Sokolov, Alexandre V. Bystrov, Alexandre Yakovlev |
| 2006 | ISCAS | Virtual self-timed blocks for systems-on-chip. | Yuan Chen, Fei Xia, Alexandre Yakovlev |
| 2005 | ADBIS | A Multi-version Data Model and Semantic-Based Transaction Processing Protocol. | Alexandre Yakovlev |
| 2005 | DATE | Modeling and Verification of Globally Asynchronous and Locally Synchronous Ring Architectures. | Sohini Dasgupta, Alexandre Yakovlev |
| 2005 | IOLTS | Power-Balanced Self Checking Circuits for Cryptographic Chips. | Julian P. Murphy, Alexandre V. Bystrov, Alexandre Yakovlev |
| 2005 | IOLTS | On-Line Testing of Globally Asynchronous Circuits. | Delong Shang, Alexandre V. Bystrov, Alexandre Yakovlev, Deepali Koppad |
| 2005 | VLSID | Off-Line Testing of Asynchronous Circuits. | Deepali Koppad, Alexandre V. Bystrov, Alexandre Yakovlev |
| 2004 | CHES | Improving the Security of Dual-Rail Circuits. | Danil Sokolov, Julian P. Murphy, Alexandre V. Bystrov, Alexandre Yakovlev |
| 2004 | DATE | An Asynchronous Synthesis Toolset Using Verilog. | Frank P. Burns, Delong Shang, Albert Koelmans, Alexandre Yakovlev |
| 2004 | ICINCO | MATLAB Models of ACMS in Control Systems. | Fei Hao, Fei Xia, E. Graeme Chester, Alexandre Yakovlev, Ian G. Clark |
| 2003 | DATE | Visualization and Resolution of Coding Conflicts in Asynchronous Circuit Design. | Agnes Madalinski, Alexandre V. Bystrov, Victor Khomenko, Alexandre Yakovlev |
| 2003 | DATE | STG Optimisation in the Direct Mapping of Asynchronous Circuits . | Danil Sokolov, Alexandre V. Bystrov, Alexandre Yakovlev |
| 2002 | DATE | Visualization of Partial Order Models in VLSI Design Flow. | Alexandre V. Bystrov, Maciej Koutny, Alexandre Yakovlev |
| 2002 | DATE | Detecting State Coding Conflicts in STGs Using Integer Programming. | Victor Khomenko, Maciej Koutny, Alexandre Yakovlev |
| 2002 | ISCAS | Analysis of the oscillation problem in tri-flops. | Oleh V. Maevsky, D. J. Kinniment, Alexandre Yakovlev, Alexandre V. Bystrov |
| 2002 | ISCAS | Asynchronous circuit synthesis via direct translation. | Delong Shang, Fei Xia, Alexandre Yakovlev |
| 2002 | VLSID | Logic Design of Asynchronous Circuits (Tutorial Abstract). | Jordi Cortadella, Alexandre Yakovlev, Jim D. Garside |
| 1999 | DAC | Automatic Synthesis and Optimization of Partially Specified Asynchronous Systems. | Alex Kondratyev, Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, Alexandre Yakovlev |
| 1999 | ICCAD | What is the cost of delay insensitivity? | Hiroshi Saito, Alex Kondratyev, Jordi Cortadella, Luciano Lavagno, Alexandre Yakovlev |
| 1998 | CONCUR | Unfolding and Finite Prefix for Nets with Read Arcs. | Walter Vogler, Alexei L. Semenov, Alexandre Yakovlev |
| 1998 | ICCAD | Lazy transition systems: application to timing optimization of asynchronous circuits. | Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexander Taubin, Alexandre Yakovlev |
| 1997 | DAC | Synthesis of Speed-Independent Circuits from STG-Unfolding Segment. | Alexei L. Semenov, Alexandre Yakovlev, Enric Pastor, Marco A. Pea, Jordi Cortadella |
| 1997 | DATE | Technology mapping of speed-independent circuits based on combinational decomposition and resynthesis. | Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev |
| 1997 | ICCAD | Decomposition and technology mapping of speed-independent circuits using Boolean relations. | Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Enric Pastor, Alexandre Yakovlev |
| 1996 | DAC | Methodology and Tools for State Encoding in Asynchronous Circuit Synthesis. | Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev |
| 1996 | DAC | Verification of asynchronous circuits using Time Petri Net unfolding. | Alexei L. Semenov, Alexandre Yakovlev |
| 1995 | ASPDAC | On hazard-free implementation of speed-independent circuits. | Alex Kondratyev, Michael Kishinevsky, Alexandre Yakovlev |
| 1995 | DATE | Checking signal transition graph implementability by symbolic BDD traversal. | Alex Kondratyev, Jordi Cortadella, Michael Kishinevsky, Enric Pastor, Oriol Roig, Alexandre Yakovlev |
| 1995 | ICCAD | Synthesizing Petri nets from state-based models. | Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, Alexandre Yakovlev |
| 1994 | DAC | Basic Gate Implementation of Speed-Independent Circuits. | Alex Kondratyev, Michael Kishinevsky, Bill Lin, Peter Vanbekbergen, Alexandre Yakovlev |
| 1993 | VLSID | Synthesis of Hazard-free Asynchronous Circuits from Generalized Signal-Transition Graphs. | Alexandre Yakovlev |
| 1992 | ICCAD | A unified signal transition graph model for asynchronous control circuit synthesis. | Alexandre Yakovlev, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli |
| 1992 | ICCD | On Limitations and Extensions of STG Model for Designing Asynchronous Control Circuits. | Alexandre Yakovlev |
| 1989 | ICPP | Analyzing Semantics of Concurrent Hardware Specifications. | Leonid Ya. Rosenblum, Alexandre Yakovlev |
| 1988 | ICPP | Signal Graphs: A Model for Designing Concurrent Logic. | Alex Kondratyev, Leonid Ya. Rosenblum, Alexandre Yakovlev |