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Axel Jantsch

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

115

Venues

33

Active years

1994–2025

Best venue rank

A*

Where they publish

Papers

115 indexed papers, newest first.

YearVenueTitleAuthors
2025COMPSACA Conformal Prediction-Based Framework for CPU Load Forecasting: A Black-Box Approach.Edin Jelacic, Cristina Seceleanu, Peter Backeman, Ning Xiong, Tiberiu Seceleanu, Axel Jantsch
2025ICMLAEfficient Edge Inference via Entropy and Magnitude-Aware Feature Map Pruning in Partitioned CNNs.Eiraj Saqib, Oscar Artur Bernd Berg, Isaac Snchez Leal, Irida Shallari, Silvia Krug, Axel Jantsch, Mattias O'Nils
2025PERCOMQuantization-Aware Training for Autoencoder-Based Partitioning of CNNs.Oscar Artur Bernd Berg, Eiraj Saqib, Axel Jantsch, Mattias O'Nils, Irida Shallari, Isaac Snchez Leal, Silvia Krug
2024ISPRGeneration of Synthetic Image Anomalies for Analysis.David Breuss, Karel Rus, Maximilian Gtzinger, Axel Jantsch
2023DATESelf-awareness in Cyber-Physical Systems: Recent Developments and Open Challenges.Lukas Esterle, Nikil D. Dutt, Christian Gruhl, Peter R. Lewis, Lucio Marcenaro, Carlo S. Regazzoni, Axel Jantsch
2023DATEMultispectral Feature Fusion for Deep Object Detection on Embedded NVIDIA Platforms.Thomas Kotrba, Martin Lechner, Omair Sarwar, Axel Jantsch
2023DSDVADAR: A Vision-based Anomaly Detection Algorithm for Railroads.David Breuss, Maximilian Gtzinger, Jenny Vuong, Clemens Reisner, Axel Jantsch
2023DSDFast, Quantization Aware DNN Training for Efficient HW Implementation.Daniel Schnll, Matthias Wess, Matthias Bittner, Maximilian Gtzinger, Axel Jantsch
2023DSDEnergy Profiling of DNN Accelerators.Matthias Wess, Dominik Dallinger, Daniel Schnll, Matthias Bittner, Maximilian Gtzinger, Axel Jantsch
2023ICMLAForecasting Critical Overloads based on Heterogeneous Smart Grid Simulation.Matthias Bittner, Daniel Hauer, Christian Stippel, Katharina Scheucher, Robin Sudhoff, Axel Jantsch
2021DATEMLComp: A Methodology for Machine Learning-based Performance Estimation and Adaptive Selection of Pareto-Optimal Compiler Optimization Sequences.Alessio Colucci, Dvid Juhsz, Martin Mosbeck, Alberto Marchisio, Semeen Rehman, Manfred Kreutzer, Gnther Nadbath, Axel Jantsch, Muhammad Shafique
2021FPLMELODI: An Online Platform for Mass Education of Digital Design - HDL to Remote FPGA.Friedrich Bauer, Felix Braun, Daniel Hauer, Axel Jantsch, Markus D. Kobelrausch, Martin Mosbeck, Nima Taherinejad, Philipp-Sebastian Vogt
2020ICAARTEvaluation of Reinforcement Learning Methods for a Self-learning System.David Bechtold, Alexander Wendt, Axel Jantsch
2020INDINCognitive Architectures for Process Monitoring - an Analysis.Alexander Wendt, Stefan Kollmann, Aleksey Bratukhin, Alireza Estaji, Thilo Sauter, Axel Jantsch
2019ANTEnergy-efficient and Reliable Wearable Internet-of-Things through Fog-Assisted Dynamic Goal Management.Arman Anzanpour, Humayun Rashid, Amir M. Rahmani, Axel Jantsch, Nikil D. Dutt, Pasi Liljeberg
2019DATETrojanZero: Switching Activity-Aware Design of Undetectable Hardware Trojans with Zero Power and Area Footprint.Imran Hafeez Abbassi, Faiq Khalid, Semeen Rehman, Awais Mehmood Kamboh, Axel Jantsch, Siddharth Garg, Muhammad Shafique
2019DATETowards a Formal Model of Recursive Self-Reflection.Axel Jantsch
2019DATEGoal-Driven Autonomy for Efficient On-chip Resource Management: Transforming Objectives to Goals.Elham Shamsa, Anil Kanduri, Amir M. Rahmani, Pasi Liljeberg, Axel Jantsch, Nikil D. Dutt
2019ISLPEDMemGANs: Memory Management for Energy-Efficient Acceleration of Complex Computations in Hardware Architectures for Generative Adversarial Networks.Muhammad Abdullah Hanif, Muhammad Zuhaib Akbar, Rehan Ahmed, Semeen Rehman, Axel Jantsch, Muhammad Shafique
2018ASPLOSSPECTR: Formal Supervisory Control and Coordination for Many-core Systems Resource Management.Amir M. Rahmani, Bryan Donyanavard, Tiago Mck, Kasra Moazzemi, Axel Jantsch, Onur Mutlu, Nikil D. Dutt
2018DSDResource Management for Mixed-Criticality Systems on Multi-core Platforms with Focus on Communication.Robin Arbaud, David Juhasz, Axel Jantsch
2018DSDTrends in On-chip Dynamic Resource Management.Kasra Moazzemi, Anil Kanduri, David Juhasz, Antonio Miele, Amir M. Rahmani, Pasi Liljeberg, Axel Jantsch, Nikil D. Dutt
2018ISCASEnhancement of Classification of Small Data Sets Using Self-awareness - An Iris Flower Case-Study.Hedyeh A. Kholerdi, Nima Taherinejad, Axel Jantsch
2018IECONApplicability of Context-Aware Health Monitoring to Hydraulic Circuits.Maximilian Gtzinger, Edwin Willegger, Nima Taherinejad, Axel Jantsch, Thilo Sauter, Thomas Glatzl, P. Lilieberg
2017DACToggle MUX: How X-Optimism Can Lead to Malicious Hardware.Christian Krieg, Clifford Wolf, Axel Jantsch, Tanja Zseby
2017DATESelf-awareness in remote health monitoring systems using wearable electronics.Arman Anzanpour, Iman Azimi, Maximilian Gotzinger, Amir M. Rahmani, Nima Taherinejad, Pasi Liljeberg, Axel Jantsch, Nikil D. Dutt
2017IECONSAMBA: A self-aware health monitoring architecture for distributed industrial systems.Lydia C. Siafara, Hedyeh A. Kholerdi, Aleksey Bratukhin, Nima Taherinejad, Alexander Wendt, Axel Jantsch, Albert Treytl, Thilo Sauter
2017ISCASNon-blocking BIST for continuous reliability monitoring of Networks-on-Chip.Junshi Wang, Letian Huang, Masoumeh Ebrahimi, Qiang Li, Guangjun Li, Axel Jantsch
2017ISCASNeural network based ECG anomaly detection on FPGA and trade-off analysis.Matthias Wess, Sai Manoj P. D., Axel Jantsch
2016FedCSISComprehensive Observation and its Role in Self-Awareness; An Emotion Recognition System Example.Nima Taherinejad, Axel Jantsch, David Pollreisz
2016ICCADApproximation knob: power capping meets energy efficiency.Anil Kanduri, Mohammad Hashem Haghbayan, Amir-Mohammad Rahmani, Pasi Liljeberg, Axel Jantsch, Nikil D. Dutt, Hannu Tenhunen
2016ICCADMalicious LUT: a stealthy FPGA trojan injected and triggered by the design flow.Christian Krieg, Clifford Wolf, Axel Jantsch
2016ISCAVisualNoC: A Visualization and Evaluation Environment for Simulation and Mapping.Junshi Wang, Yang Huang, Masoumeh Ebrahimi, Letian Huang, Qiang Li, Axel Jantsch, Guangjun Li
2015DATEA packet-switched interconnect for many-core systems with BE and RT service.Runan Ma, Zhida Hui, Axel Jantsch
2015ICCADSelf-Aware Cyber-Physical Systems-on-Chip.Nikil D. Dutt, Axel Jantsch, Santanu Sarma
2015ICCDDark silicon aware runtime mapping for many-core systems: A patterning approach.Anil Kanduri, Mohammad Hashem Haghbayan, Amir-Mohammad Rahmani, Pasi Liljeberg, Axel Jantsch, Hannu Tenhunen
2015ISLPEDDynamic power management for many-core platforms in the dark silicon era: A multi-objective control approach.Amir-Mohammad Rahmani, Mohammad Hashem Haghbayan, Anil Kanduri, Awet Yemane Weldezion, Pasi Liljeberg, Juha Plosila, Axel Jantsch, Hannu Tenhunen
2015PDPA Routing-Level Solution for Fault Detection, Masking, and Tolerance in NoCs.Xiaofan Zhang, Masoumeh Ebrahimi, Letian Huang, Guangjun Li, Axel Jantsch
2014DATEParallel probe based dynamic connection setup in TDM NoCs.Shaoteng Liu, Axel Jantsch, Zhonghai Lu
2014ICCDDark silicon aware power management for manycore systems under dynamic workloads.Mohammad Hashem Haghbayan, Amir-Mohammad Rahmani, Awet Yemane Weldezion, Pasi Liljeberg, Juha Plosila, Axel Jantsch, Hannu Tenhunen
2014ISCASPerformance and network power evaluation of tightly mixed SRAM NUCA for 3D Multi-core Network on Chips.Yuang Zhang, Li Li, Zhonghai Lu, Axel Jantsch, Yuxiang Fu, Minglun Gao
2013DSDAnalysis and Evaluation of Circuit Switched NoC and Packet Switched NoC.Shaoteng Liu, Axel Jantsch, Zhonghai Lu
2013MICROCosts and benefits of flexibility in spatial division circuit switched networks-on-chip.Ahsen Ejaz, Axel Jantsch
2012CASESAnalytical approaches for performance evaluation of networks-on-chip.Abbas Eslami Kiasari, Axel Jantsch, Marco Bekooij, Alan Burns, Zhonghai Lu
2012DATEWorst-case delay analysis of Variable Bit-Rate flows in network-on-chip with aggregate scheduling.Fahimeh Jafari, Axel Jantsch, Zhonghai Lu
2012DATEParallel probing: Dynamic and constant time setup procedure in circuit switching NoC.Shaoteng Liu, Axel Jantsch, Zhonghai Lu
2012DSDArchitecture Support and Comparison of Three Memory Consistency Models in NoC Based Systems.Abdul Naeem, Axel Jantsch, Zhonghai Lu
2012IWCMCSystem-level evaluation of sensor networks deployment strategies: Coverage, lifetime and cost.Huimin She, Zhonghai Lu, Axel Jantsch
2011ASPDACPower-efficient tree-based multicast support for Networks-on-Chip.Wenmin Hu, Zhonghai Lu, Axel Jantsch, Hengzhu Liu
2011ASPDACRealization and performance comparison of sequential and weak memory consistency models in network-on-chip based multi-core systems.Abdul Naeem, Xiaowen Chen, Zhonghai Lu, Axel Jantsch
2011DSDRealization and Scalability of Release and Protected Release Consistency Models in NoC Based Systems.Abdul Naeem, Axel Jantsch, Xiaowen Chen, Zhonghai Lu
2011ICCADModeling the computational efficiency of 2-D and 3-D silicon processors for early-chip planning.Matthew Grange, Axel Jantsch, Roshan Weerasekera, Dinesh Pamunuwa
2011ICCDOutput process of variable bit-rate flows in on-chip networks based on aggregate scheduling.Fahimeh Jafari, Axel Jantsch, Zhonghai Lu
2011PIMRCStochastic coverage in event-driven sensor networks.Huimin She, Zhonghai Lu, Axel Jantsch, Dian Zhou, Li-Rong Zheng
2011WCNCModeling and analysis of Rayleigh fading channels using stochastic network calculus.Huimin She, Zhonghai Lu, Axel Jantsch, Dian Zhou, Li-Rong Zheng
2010ASPDACConstrained global scheduling of streaming applications on MPSoCs.Jun Zhu, Ingo Sander, Axel Jantsch
2010DATESupporting Distributed Shared Memory on multi-core Network-on-Chips using a dual microcoded controller.Xiaowen Chen, Zhonghai Lu, Axel Jantsch, Shuming Chen
2010DATEOptimal regulation of traffic flows in networks-on-chip.Fahimeh Jafari, Zhonghai Lu, Axel Jantsch, Mohammad Hossien Yaghmaee
2010DATEFPGA-based adaptive computing for correlated multi-stream processing.Ming Liu, Zhonghai Lu, Wolfgang Kuehn, Axel Jantsch
2010DATEPareto efficient design for reconfigurable streaming applications on CPU/FPGAs.Jun Zhu, Ingo Sander, Axel Jantsch
2010DDECSTheorem proving techniques for the formal verification of NoC communications with non-minimal adaptive routing.Amr Helmy, Laurence Pierre, Axel Jantsch
2010FDLHetMoC: Heterogeneous Modelling in SystemC.Jun Zhu, Ingo Sander, Axel Jantsch
2010ISCASScalability of weak consistency in NoC based multicore architectures.Abdul Naeem, Xiaowen Chen, Zhonghai Lu, Axel Jantsch
2010MICROA reconfigurable fault-tolerant deflection routing algorithm based on reinforcement learning for network-on-chip.Chaochao Feng, Zhonghai Lu, Axel Jantsch, Jinwen Li, Minxuan Zhang
2010MICROA framework for designing congestion-aware deterministic routing.Abbas Eslami Kiasari, Axel Jantsch, Zhonghai Lu
2010NPCA Worst Case Performance Model for TDM Virtual Circuit in NoCs.Zhipeng Chen, Axel Jantsch
2009DATEFlow regulation for on-chip communication.Zhonghai Lu, Mikael Millberg, Axel Jantsch, Alistair C. Bruce, Pieter van der Wolf, Tomas Henriksson
2009DATEPriority based forced requeue to reduce worst-case latencies for bursty traffic.Mikael Millberg, Axel Jantsch
2009DATEBuffer minimization of real-time streaming applications scheduling on hybrid CPU/FPGA architectures.Jun Zhu, Ingo Sander, Axel Jantsch
2009FPLRun-time Partial Reconfiguration speed investigation and architectural design space exploration.Ming Liu, Wolfgang Kuehn, Zhonghai Lu, Axel Jantsch
2009VTCAnalytical Evaluation of Retransmission Schemes in Wireless Sensor Networks.Huimin She, Zhonghai Lu, Axel Jantsch, Dian Zhou, Li-Rong Zheng
2008DATEHeterogeneous System-level Specification Using SystemC.Eugenio Villar, Axel Jantsch, Christoph Grimm, Tim Kogel
2008DDECSCluster-based Simulated Annealing for Mapping Cores onto 2D Mesh Networks on Chip.Zhonghai Lu, Lei Xia, Axel Jantsch
2008DSDSystem-on-an-FPGA Design for Real-time Particle Track Recognition and Reconstruction in Physics Experiments.Ming Liu, Wolfgang Kuehn, Zhonghai Lu, Axel Jantsch
2008EMSOFTEnergy efficient streaming applications with guaranteed throughput on MPSoCs.Jun Zhu, Ingo Sander, Axel Jantsch
2008FPLATCA-based computation platform for data acquisition and triggering in particle physics experiments.Ming Liu, Johannes Lang, Shuo Yang, Tiago Perez, Wolfgang Kuehn, Hao Xu, Dapeng Jin, Qiang Wang, Lu Li, Zhen'An Liu, Zhonghai Lu, Axel Jantsch
2007DACLayered Switching for Networks on Chip.Zhonghai Lu, Ming Liu, Axel Jantsch
2007DSDIncreasing NoC Performance and Utilisation using a Dual Packet Exit Strategy.Mikael Millberg, Axel Jantsch
2007FPLThe ANDRES Project: Analysis and Design of Run-Time Reconfigurable, Heterogeneous Systems.Andreas Herrholz, Frank Oppenheimer, Philipp A. Hartmann, Andreas Schallenberg, Wolfgang Nebel, Christoph Grimm, Markus Damm, Jan Haase, Florian Brame, Fernando Herrera, Eugenio Villar, Ingo Sander, Axel Jantsch, Anne-Marie Fouilliart, Marcos Martnez
2007ICCADSlot allocation using logical networks for TDM virtual-circuit configuration for network-on-chip.Zhonghai Lu, Axel Jantsch
2007RSPUsing Synchronizers for Refining Synchronous Communication onto Hardware/Software Architectures.Zhonghai Lu, Jonas Sicking, Ingo Sander, Axel Jantsch
2006DACA multiprocessor system-on-chip for real-time biomedical monitoring and analysis: architectural design space exploration.Iyad Al Khatib, Francesco Poletti, Davide Bertozzi, Luca Benini, Mohamed Bechara, Hasan Khalifeh, Axel Jantsch, Rustam Nabiev
2006DSDAdaptive Power Management for the On-Chip Communication Network.Guang Liang, Axel Jantsch
2006DSDTowards Performance-Oriented Pattern-Based Refinement of Synchronous Models onto NoC Communication.Zhonghai Lu, Ingo Sander, Axel Jantsch
2006DSDA High Level Power Model for the Nostrum NoC.Sandro Penolazzi, Axel Jantsch
2006DSDFlexible Bus and NoC Performance Analysis with Configurable Synthetic Workloads.Rikard Thid, Ingo Sander, Axel Jantsch
2006IWCMCAn algorithm for electing cluster heads based on maximum residual energy.Weixing Wang, Axel Jantsch
2005ASPDACFeasibility analysis of messages for on-chip networks using wormhole routing.Zhonghai Lu, Axel Jantsch, Ingo Sander
2005FDLRefinement of Perfectly Synchronous Communication Model.Zhonghai Lu, Ingo Sander, Axel Jantsch
2005FDLModelling Environment for Heterogeneous Systems based on MoCs.Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla, Axel Jantsch
2005ICCADSystem level verification of digital signal processing applications based on the polynomial abstraction technique.Tarvo Raudvere, Ashish Kumar Singh, Ingo Sander, Axel Jantsch
2005ISCASPower analysis of link level and end-to-end data protection in networks on chip.Axel Jantsch, Robert Lauter, Arseni Vitkovski
2004DACSystem design for DSP applications in transaction level modeling paradigm.Abhijit K. Deb, Axel Jantsch, Johnny berg
2004DATESystem Design for DSP Applications Using the MASIC Methodology.Abhijit K. Deb, Axel Jantsch, Johnny berg
2004DATEGuaranteed Bandwidth Using Looped Containers in Temporally Disjoint Networks within the Nostrum Network on Chip.Mikael Millberg, Erland Nilsson, Rikard Thid, Axel Jantsch
2004DATEPolynomial Abstraction for Verification of Sequentially Implemented Combinational Circuits.Tarvo Raudvere, Ashish Kumar Singh, Ingo Sander, Axel Jantsch
2004VLSIDThe Nostrum Backbone - a Communication Protocol Stack for Networks on Chip.Mikael Millberg, Erland Nilsson, Rikard Thid, Shashi Kumar, Axel Jantsch
2003DATESimulation and Analysis of Embedded DSP Systems Using MASIC Methodology.Abhijit K. Deb, Johnny berg, Axel Jantsch
2003DATELoad Distribution with the Proximity Congestion Awareness in a Network on Chip.Erland Nilsson, Mikael Millberg, Johnny berg, Axel Jantsch
2003DATEDevelopment and Application of Design Transformations in ForSyDe.Ingo Sander, Axel Jantsch, Zhonghai Lu
2003DSDNoCs: A new Contract between Hardware and Software.Axel Jantsch
2003VLSIDExtending Platform-Based Design to Network on Chip Systems.Juha-Pekka Soininen, Axel Jantsch, Martti Forsell, Antti Pelkonen, Jari Kreku, Shashi Kumar
2003RSPSimulation and Analysis of Embedded DSP Systems Using Petri Nets.Abhijit K. Deb, Johnny berg, Axel Jantsch
2002DACTransformation based communication and clock domain refinement for system design.Ingo Sander, Axel Jantsch
2000DATEMASCOT: A Specification and Cosimulation Method Integrating Data and Control Flow.Per Bjurus, Axel Jantsch
2000DATEComposite Signal Flow: A Computational Model Combining Events, Sampled Streams, and Vectors.Axel Jantsch, Per Bjurus
2000FPLA Dynamically Reconfigurable FPGA-Based Content Addressable Memory for Internet Protocol Characterization.Johan Ditmar, Kjell Torkelsson, Axel Jantsch
1999DATEThe Rugby Model: A Conceptual Frame for the Study of Modelling, Analysis and Synthesis Concepts of Electronic Systems.Axel Jantsch, Shashi Kumar, Ahmed Hemani
1999DATEOperating System Sensitive Device Driver Synthesis from Implementation Independent Protocol Specification.Mattias O'Nils, Axel Jantsch
1999VLSIDSynthesis of DMA Controllers from Architecture Independent Descriptions of HW/SW Communication Protocols.Mattias O'Nils, Axel Jantsch
1999VLSIDFormal System Design Based on the Synchrony Hypothesis, Functional Models and Skeletons.Ingo Sander, Axel Jantsch
1998VLSIDAn Object-Oriented Concept for Intelligent Library Functions.Johnny berg, Axel Jantsch, Anshul Kumar
1996VLSIDA Rule-Based Approach for Improving Allocation of Filter Structures in HLS.Johnny berg, Jouni Isoaho, Peeter Ellervee, Axel Jantsch, Ahmed Hemani
1996VLSIDA Novell Allocation Strategy for Control and Memory Intensive Telecommunication Circiuts.Bengt Svantesson, Ahmed Hemani, Peeter Ellervee, Adam Postula, Johnny berg, Axel Jantsch, Hannu Tenhunen
1994FPLDSP Development with Full-Speed Prototyping Based on HW/SW Codesign Techniques.Jouni Isoaho, Axel Jantsch, Hannu Tenhunen