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Benton H. Calhoun

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

57

Venues

12

Active years

2003–2026

Best venue rank

A*

Where they publish

Papers

57 indexed papers, newest first.

YearVenueTitleAuthors
2026ISCASTAuC-SoC: A 0.36 mmSuprio Bhattacharya, Charlie D. Hess, Omar Faruqe, J. Keith McElveen, Douglas Cairns, Doug Overland, Jonathan Johnson, Daniel S. Truesdell, Benton H. Calhoun
2026ISCASA High dv/dt-Tolerant Level Shifter with Sub-Nanosecond Delay Using Dummy Pulse Protection.Zane Gunn, Daniel S. Truesdell, Benton H. Calhoun
2025ISCASCharacterization of Stacked PV Cell Configurations in a Deep N-Well 65nm CMOS Technology.Anjali Agrawal, Xinjian Liu, Daniel S. Truesdell, Benton H. Calhoun
2025ISCASA 0.36 mmOmar Faruqe, Zhenghong Chen, Suprio Bhattacharya, Md. Fahim Foysal, Samit Hasan, Daniel S. Truesdell, Benton H. Calhoun
2025ISCASA Fully Integrated, Custom End-to-End PPG Sensing System for Ultra-Low Power Wearables.Omar Faruqe, Peter Le, Daehyun Lee, Xinjian Liu, Omar Abdelatty, Daniel S. Truesdell, Benton H. Calhoun
2025ISCASA Sub-μW Digital Temperature Compensation Architecture for Arbitrary Voltage and Current Reference Generation.Natalie B. Ownby, Prerana Singaraju, Suprio Bhattacharya, Steven M. Bowers, Benton H. Calhoun
2023DATEAuxcellGen: A Framework for Autonomous Generation of Analog and Memory Unit Cells.Sumanth Kamineni, Arvind K. Sharma, Ramesh Harjani, Sachin S. Sapatnekar, Benton H. Calhoun
2022ISCASA Photoplethysmography Analog Front-End Model for Rapid Design of Personalized Healthcare Hardware.Peng Wang, Benton H. Calhoun
2021ISCASStacked Transconductance Boosting for Ultra-Low Power 2.4GHz RF Front-End Design.Anjana Dissanayake, Steven M. Bowers, Benton H. Calhoun
2021ISCASGraph Coloring Using Coupled Oscillator-Based Dynamical Systems.Antik Mallick, Mohammad Khairul Bashar, Daniel S. Truesdell, Benton H. Calhoun, Siddharth Joshi, Nikhil Shukla
2020ISCASAn 85 nW IoT Node-Controlling SoC for MELs Power-Mode Management and Phantom Energy Reduction.Shuo Li, Jacob Breiholz, Sumanth Kamineni, Jaeho Im, David D. Wentzloff, Benton H. Calhoun
2020ISCASApplication-Driven Model of a PPG Sensing Modality for the Informed Design of Self-Powered, Wearable Healthcare Systems.Henry L. Bishop, Peng Wang, Benton H. Calhoun
2020ISLPEDAn 88.6nW ozone pollutant sensing interface IC with a 159 dB dynamic range.Rishika Agarwala, Peng Wang, Akhilesh Tanneeru, Bongmook Lee, Veena Misra, Benton H. Calhoun
2019VLSIDA Double Pumped Single-Line-Cache SRAM Architecture for Ultra-low Energy IoT and Machine Learning Applications.Arijit Banerjee, Benton H. Calhoun
2018FPGAFGC: A Tool-flow for Generating and Configuring Custom FPGAs(Abstract Only).Oluseyi A. Ayorinde, He Qi, Benton H. Calhoun
2018ISCASAn Ultra-low Power System On Chip Enabling DVS with SR Level Shifting Latches.Christopher J. Lukas, Farah B. Yahya, Benton H. Calhoun
2018ISLPEDMultiple Combined Write-Read Peripheral Assists in 6T FinFET SRAMs for Low-VMIN IoT and Cognitive Applications.Arijit Banerjee, Sumanth Kamineni, Benton H. Calhoun
2017IOLTSSoft errors: Reliability challenges in energy-constrained ULP body sensor networks applications.Harsh N. Patel, Benton H. Calhoun, Randy W. Mann
2017ITCModeling trans-threshold correlations for reducing functional test time in ultra-low power systems.Christopher J. Lukas, Farah B. Yahya, Benton H. Calhoun
2016ISCASExploring circuit robustness to power supply variation in low-voltage latch and register-based digital systems.Abhishek Roy, Benton H. Calhoun
2016VLSIDImproving Reliability and Energy Requirements of Memory in Body Sensor Networks.Harsh N. Patel, Farah B. Yahya, Benton H. Calhoun
2015CASESSelf-powered wearable sensor platforms for wellness.Veena Misra, Benton H. Calhoun, Shekhar Bhansali, John C. Lach, Suman Datta, Mehmet Ozturk, Alper Bozkurt, mer Oralkan, Jason Strohmaier
2015FPLUsing island-style bi-directional intra-CLB routing in low-power FPGAs.Oluseyi A. Ayorinde, He Qi, Yu Huang, Benton H. Calhoun
2015FPLOptimizing energy efficient low-swing interconnect for sub-threshold FPGAs.He Qi, Oluseyi A. Ayorinde, Yu Huang, Benton H. Calhoun
2015ISCASError-energy analysis of hardware logarithmic approximation methods for low power applications.Alicia Klinefelter, Joseph F. Ryan, James W. Tschanz, Benton H. Calhoun
2015ISCASA 0.38 pj/bit 1.24 nW chip-to-chip serial link for ultra-low power systems.Christopher J. Lukas, Benton H. Calhoun
2014FCCMFlexibility and Circuit Overheads in Reconfigurable SIMD/MIMD Systems.Saad Arrabi, D. Moore, L. Wang, Kevin Skadron, Benton H. Calhoun, John C. Lach, Brett H. Meyer
2014ISLPEDA digital dynamic write margin sensor for low power read/write operations in 28nm SRAM.Peter Beshay, Vikas Chandra, Rob Aitken, Benton H. Calhoun
2014VLSIDPipelined Non-strobed Sensing Scheme for Lowering BL Swing in Nano-scale Memories.Sudhanshu Khanna, Satyanand Nalam, Benton H. Calhoun
2013DACFlexible on-chip power delivery for energy efficient heterogeneous systems.Benton H. Calhoun, Kyle Craig
2013DATELeveraging sensitivity analysis for fast, accurate estimation of SRAM dynamic write VJames Boley, Vikas Chandra, Robert C. Aitken, Benton H. Calhoun
2013FPGACircuit optimizations to minimize energy in the global interconnect of a low-power-FPGA (abstract only).Oluseyi A. Ayorinde, Benton H. Calhoun
2013VLSIDA 50nW, 100kbps Clock/Data Recovery Circuit in an FSK RF Receiver on a Body Sensor Node.Aatmesh Shrivastava, Jagdish Nayayan Pandey, Brian P. Otis, Benton H. Calhoun
2012ISLPEDOptimal power switch design for dynamic voltage scaling from high performance to subthreshold operation.Kyle Craig, Yousef Shakhsheer, Benton H. Calhoun
2012ISLPEDA programmable resistive power grid for post-fabrication flexibility and energy tradeoffs.Kyle Craig, Yousef Shakhsheer, Sudhanshu Khanna, Saad Arrabi, John C. Lach, Benton H. Calhoun, Stephen Kosonocky
2012ISLPEDA charge pump based receiver circuit for voltage scaled interconnect.Aatmesh Shrivastava, John C. Lach, Benton H. Calhoun
2011CASESCost-effective safety and fault localization using distributed temporal redundancy.Brett H. Meyer, Benton H. Calhoun, John C. Lach, Kevin Skadron
2011DATEReducing the cost of redundant execution in safety-critical systems using relaxed dedication.Brett H. Meyer, Nishant J. George, Benton H. Calhoun, John C. Lach, Kevin Skadron
2011DATEDynamic write limited minimum operating voltage for nanoscale SRAMs.Satyanand Nalam, Vikas Chandra, Robert C. Aitken, Benton H. Calhoun
2011ISLPEDAn analytical model for performance yield of nanoscale SRAM accounting for the sense amplifier strobe signal.Joseph F. Ryan, Sudhanshu Khanna, Benton H. Calhoun
2010DACVirtual prototyper (ViPro): an early design space exploration and optimization tool for SRAM designers.Satyanand Nalam, Mudit Bhargava, Ken Mai, Benton H. Calhoun
2010DACSRAM-based NBTI/PBTI sensor system design.Zhenyu Qi, Jiajing Wang, Adam C. Cabe, Stuart N. Wooters, Travis N. Blalock, Benton H. Calhoun, Mircea R. Stan
2010ISCASSystem design principles combining sub-threshold circuit and architectures with energy scavenging mechanisms.Benton H. Calhoun, Sudhanshu Khanna, Yanqing Zhang, Joseph F. Ryan, Brian P. Otis
2009ICCDA Technology-Agnostic Simulation Environment (TASE) for iterative custom IC design across processes.Satyanand Nalam, Mudit Bhargava, Kyle Ringgenberg, Ken Mai, Benton H. Calhoun
2009ICCDPanoptic DVS: A fine-grained dynamic voltage scaling framework for energy scalable CMOS design.Mateja Putic, Liang Di, Benton H. Calhoun, John C. Lach
2009ISCASSub-threshold Operation and Cross-hierarchy Design for Ultra Low Power Wearable Sensors.Benton H. Calhoun, Jonathan F. Bolus, Sudhanshu Khanna, Andrew D. Jurik, Alfred C. Weaver, Travis N. Blalock
2009ISCASSub-threshold Circuit Design with Shrinking CMOS Devices.Benton H. Calhoun, Sudhanshu Khanna, Randy W. Mann, Jiajing Wang
2009ISLPEDA 2.6 W sub-threshold mixed-signal ECG SoC.Steven C. Jocke, Jonathan F. Bolus, Stuart N. Wooters, Travis N. Blalock, Benton H. Calhoun
2009ISLPEDSerial sub-threshold circuits for ultra-low-power systems.Sudhanshu Khanna, Benton H. Calhoun
2008ICCDPower switch characterization for fine-grained dynamic voltage scaling.Liang Di, Mateja Putic, John C. Lach, Benton H. Calhoun
2008ISLPEDAnalyzing static and dynamic write margin for nanometer SRAMs.Jiajing Wang, Satyanand Nalam, Benton H. Calhoun
2008VLSIDRecursive Statistical Blockade: An Enhanced Technique for Rare Event Simulation with Application to SRAM Circuit Design.Amith Singhee, Jiajing Wang, Benton H. Calhoun, Rob A. Rutenbar
2006ISLPEDSub-threshold design: the challenges of minimizing circuit energy.Benton H. Calhoun, Alice Wang, Naveen Verma, Anantha P. Chandrakasan
2004ISLPEDCharacterizing and modeling minimum energy operation for subthreshold circuits.Benton H. Calhoun, Anantha P. Chandrakasan
2004VLSIDDesign Considerations for Next Generation Wireless Power-Aware Microsensor Nodes.David D. Wentzloff, Benton H. Calhoun, Rex Min, Alice Wang, Nathan Ickes, Anantha P. Chandrakasan
2003FPGAPower-aware architectures and circuits for FPGA-based signal processing.Frank Honor, Benton H. Calhoun, Anantha P. Chandrakasan
2003ISLPEDDesign methodology for fine-grained leakage control in MTCMOS.Benton H. Calhoun, Frank Honor, Anantha P. Chandrakasan