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Bruno Ricc

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

42

Venues

16

Active years

1988–2013

Best venue rank

A*

Where they publish

Papers

42 indexed papers, newest first.

YearVenueTitleAuthors
2013CHIBRAVO: a brain virtual operator for education exploiting brain-computer interfaces.Marco Marchesi, Bruno Ricc
2013SIGGRAPHAugmented graphics for interactive storytelling on a mobile device.Marco Marchesi, Bruno Ricc
2011SiggraphAMOBIE: a Movie Brain Interactive Editor.Marco Marchesi, Elisabetta Farella, Bruno Ricc, Antonella Guidazzoli
2008SIGGRAPHA smart wireless glove for gesture interaction.Elisabetta Farella, Omar Cafini, Luca Benini, Bruno Ricc
2006DATE3dID: a low-power, low-cost hand motion capture device.Michele Sama, Vincenzo Pacella, Elisabetta Farella, Luca Benini, Bruno Ricc
2005DATEHardware-Software Design of a Smart Sensor for Fully-Electronic DNA Hybridization Detection.Claudio Stagni, Carlotta Guiducci, Massimo Lanzoni, Luca Benini, Bruno Ricc
2003ETFASelf-positioning digital window comparators for mixed-signal DfT.Daniela De Venuto, Michael J. Ohletz, Bruno Ricc
2002CASESSystem lifetime extension by battery management: an experimental work.Davide Bruni, Luca Benini, Bruno Ricc
2002CASESLow Power Control Techniques For TFT LCD Displays.Franco Gatti, Andrea Acquaviva, Luca Benini, Bruno Ricc
2002DATESelf-Checking Scheme for the On-Line Testing of Power Supply Noise.Cecilia Metra, Luca Schiano, Bruno Ricc, Michele Favalli
2002ICRAA New Stress Sensor for Force/Torque Measurements.Luigi Biagiotti, M. Gavesi, Claudio Melchiorri, Bruno Ricc
2002IOLTSFast and Compact Error Correcting Scheme for Reliable Multilevel Flash Memories.Daniele Rossi, Cecilia Metra, Bruno Ricc
2002ISCASAn adaptive data compression scheme for memory traffic minimization in processor-based systems.Luca Benini, Davide Bruni, Bruno Ricc, Alberto Macii, Enrico Macii
2002ISCASEnergy-efficient and reliable low-swing signaling for on-chip buses based on redundant coding.Davide Bertozzi, Luca Benini, Bruno Ricc
2002ISLPEDParametric timing and power macromodels for high level simulation of low-swing interconnects.Davide Bertozzi, Luca Benini, Bruno Ricc
2002WCNCPower aware network interface management for streaming multimedia.Davide Bertozzi, Luca Benini, Bruno Ricc
2001DATEAn adaptive algorithm for low-power streaming multimedia processing.Andrea Acquaviva, Luca Benini, Bruno Ricc
2001ETSOn-chip signal level evaluation for mixed-signal ICs using digital window comparators.Daniela De Venuto, M. J. Ohletzo, Bruno Ricc
2001ITCOn-line testing of transient and crosstalk faults affecting interconnections of FPGA-implemented systems.Cecilia Metra, Andrea Pagano, Bruno Ricc
2000DATEOn-Line Testing and Diagnosis of Bus Lines with respect to Intermediate Voltage Values.Cecilia Metra, Michele Favalli, Bruno Ricc
1999ISLPEDEfficient switching activity computation during high-level synthesis of control-dominated designs.Alessandro Bogliolo, Luca Benini, Bruno Ricc, Giovanni De Micheli
1999ITCSelf-checking scheme for very fast clocks' skew correction.Cecilia Metra, Flavio Giovanelli, Mani Soma, Bruno Ricc
1998DATEHighly Testable and Compact 1-out-of-n Code Checker with Single Output.Cecilia Metra, Michele Favalli, Bruno Ricc
1998ISLPEDMonitoring system activity for OS-directed dynamic power management.Luca Benini, Alessandro Bogliolo, Stefano Cavallucci, Bruno Ricc
1998ITCOn-line detection of logic errors due to crosstalk, delay, and transient faults.Cecilia Metra, Michele Favalli, Bruno Ricc
1997ITCOn-Line Testing Scheme for Clock's Faults.Cecilia Metra, Michele Favalli, Bruno Ricc
1997VTSHighly testable and compact single output comparator.Cecilia Metra, Michele Favalli, Bruno Ricc
1996DACPower Estimation of Cell-Based CMOS Circuits.Alessandro Bogliolo, Luca Benini, Bruno Ricc
1996ISLPEDGate-level current waveform simulation of CMOS integrated circuits.Alessandro Bogliolo, Luca Benini, Giovanni De Micheli, Bruno Ricc
1996VTSEmbedded two-rail checkers with on-line testing ability.Cecilia Metra, Michele Favalli, Bruno Ricc
1995DATEA novel DFT technique for critical bridging faults in CMOS and BiCMOS ICs.Michele Favalli, Bruno Ricc, L. Penza
1995VTSReliability evaluation of combinational logic circuits by symbolic simulation.Alessandro Bogliolo, Maurizio Damiani, Piero Olivo, Bruno Ricc
1993ITCAnalyss of Dynamic Effects of Resistive Bridging Faults in CMOS and BiCMOS Digital ICs.Michele Favalli, Marcello Dalpasso, Piero Olivo, Bruno Ricc
1992ITCParametric Bridging Fault Characterization for the Fault Simulation of Library-Based ICs.Marcello Dalpasso, Michele Favalli, Piero Olivo, Bruno Ricc
1992ITCAnalysis of Steady State Detection of Resistive Bridging Faults in BiCMOS Digital ICs.Michele Favalli, Marcello Dalpasso, Piero Olivo, Bruno Ricc
1992ITCCMOS Checkers with Testable Bridging and Transistor Stuck-on Faults.Cecilia Metra, Michele Favalli, Piero Olivo, Bruno Ricc
1990ITCAn improved procedure to test CMOS ICs for latch-up.Roberto Menozzi, Massimo Lanzoni, Luca Selmi, Bruno Ricc
1989ICCDImproved testability evaluations in combinational logic networks.Silvia Ercolani, Michele Favalli, Maurizio Damiani, Piero Olivo, Bruno Ricc
1989ITCCMOS Design for Improved IC Testability.Michele Favalli, Piero Olivo, Maurizio Damiani, Bruno Ricc
1989ITCA Testing Technique to Characterize E^2PROM's Aging and Endurance.Massimo Lanzoni, Piero Olivo, Bruno Ricc
1989ITCOn the Design of Multiple-Input Shift-Registers for Signature Analysis Testing.Piero Olivo, Maurizio Damiani, Bruno Ricc
1988ICCDAliasing errors in signature analysis testing of integrated circuits.Maurizio Damiani, Piero Olivo, Michele Favalli, Bruno Ricc