| 2026 | IOLTS | Reliability of Multilevel Cell Phase-Change Memories for AI Implementations. | G. Settegrani, R. Gattoni, Sara Cret, Matteo Naldi, Martin Omaa, Cecilia Metra, I. S. Troja |
| 2025 | DSD | Non-Functional Properties in HPC Systems: Design Exploration of Energy, Power, and Reliability. | Giovanni Agosta, Enrico Bini, Davide Baroffio, Carlo Brandolese, Michele Castrovilli, Daniele Cattaneo, Daniele Cesarini, William Fornaciari, Andrea Galimberti, Alberto Garfagnini, Arsenii Gavrikov, Francesco Iannone, Marco Lapegna, Tomas Antonio Lpez, Gabriele Magnani, Gabriele Mencagli, Cecilia Metra, Martin Eugenio Omana, Filippo Palombi, Federico Reghenzani, Josie E. Rodriguez Condia, A. Serafini, Matteo Sonza Reorda, Davide Zoni, Giuseppe Zummo |
| 2025 | IOLTS | On-Line Test of Fully Integrated Voltage Regulators for High Performance Microprocessors of Autonomous Systems. | Martin Omaa, A. Menghi, A. Stefani, E. Vicini, Cecilia Metra, G. Froio, S. Petrucci |
| 2024 | IOLTS | Silent Data Corruption and Reliability Risks due to Faults Affecting High Performance Microprocessors' Caches. | Martin Omaa, A. Manfredi, Cecilia Metra, R. Locatelli, M. Chiavacci, S. Petrucci |
| 2024 | IOLTS | Reliability of AI in Predicting the State of Health of Li-Ion Batteries | Sara Cret, Martin Omaa, Cecilia Metra, Gianni Borelli |
| 2024 | IOLTS | On the Reliability of Clock Monitoring Units for Safety Critical Applications' Microcontrollers. | Massimiliano Zhupa, Matteo Naldi, Martin Omaa, Cecilia Metra |
| 2022 | IOLTS | Novel BTI Robust Ring-Oscillator-Based Physically Unclonable Function. | Marco Grossi, Martin Omaa, Daniele Rossi, Biagio Marzulli, Cecilia Metra |
| 2016 | DATE | Inverters' self-checking monitors for reliable photovoltaic systems. | Martin Omaa, A. Fiore, Cecilia Metra |
| 2013 | ETS | Novel approach to reduce power droop during scan-based logic BIST. | Martin Omaa, Daniele Rossi, Filippo Fuzzi, Cecilia Metra, Chandra Tirumurti, R. Galivache |
| 2011 | DATE | Error correcting code analysis for cache memory high reliability and performance. | Daniele Rossi, N. Timoncini, M. Spica, Cecilia Metra |
| 2008 | ETS | Function-Inherent Code Checking: A New Low Cost On-Line Testing Approach for High Performance Microprocessor Control Logic. | Cecilia Metra, Daniele Rossi, Martin Omaa, Abhijit Jas, Rajesh Galivanche |
| 2008 | ETS | Risks for Signal Integrity in System in Package and Possible Remedies. | Daniele Rossi, Paolo Angelini, Cecilia Metra, Giovanni Campardo, Gian Pietro Vanalli |
| 2007 | DATE | Interactive presentation: Pulse propagation for the detection of small delay defects. | Michele Favalli, Cecilia Metra |
| 2007 | IOLTS | Configurable Error Control Scheme for NoC Signal Integrity. | Daniele Rossi, Paolo Angelini, Cecilia Metra |
| 2007 | ITC | Novel compensation scheme for local clocks of high performance microprocessors. | Cecilia Metra, Martin Omaa, T. M. Mak, Simon Tam |
| 2007 | VTS | Novel Approach to Clock Fault Testing for High Performance Microprocessors. | Cecilia Metra, Martin Omaa, T. M. Mak, Simon Tam |
| 2006 | DATE | Low-cost and highly reliable detector for transient and crosstalk faults affecting FPGA interconnects. | Martin Omaa, Jos Manuel Cazeaux, Daniele Rossi, Cecilia Metra |
| 2006 | DATE | Analysis of the impact of bus implemented EDCs on on-chip SSN. | Daniele Rossi, Carlo Steiner, Cecilia Metra |
| 2006 | DDECS | Can Clock Faults be Detected Through Functional Test? | Cecilia Metra, Daniele Rossi, Martin Omaa, Jos Manuel Cazeaux, T. M. Mak |
| 2006 | IOLTS | Path (Min) Delay Faults and Their Impact on Self-Checking Circuits' Operation. | Cecilia Metra, Martin Omaa, Daniele Rossi, Jos Manuel Cazeaux, T. M. Mak |
| 2006 | IOLTS | Checker No-Harm Alarm Robustness. | Daniele Rossi, Martin Omaa, Cecilia Metra, Andrea Pagni |
| 2005 | IOLTS | On Transistor Level Gate Sizing for Increased Robustness to Transient Faults. | Jos Manuel Cazeaux, Daniele Rossi, Martin Omaa, Cecilia Metra, Abhijit Chatterjee |
| 2005 | IOLTS | Load and Logic Co-Optimization for Design of Soft-Error Resistant Nanometer CMOS Circuits. | Yuvraj Singh Dhillon, Abdulkadir Utku Diril, Abhijit Chatterjee, Cecilia Metra |
| 2005 | IOLTS | Coding Techniques for Low Switching Noise in Fault Tolerant Busses. | Andr K. Nieuwland, Atul Katoch, Daniele Rossi, Cecilia Metra |
| 2005 | IOLTS | On the Selection of Unidirectional Error Detecting Codes for Self-Checking Circuits' Area Overhead and Performance Optimization. | Martin Omaa, O. Losco, Cecilia Metra, Andrea Pagni |
| 2005 | VTS | Low Cost Scheme for On-Line Clock Skew Compensation. | Martin Omaa, Daniele Rossi, Cecilia Metra |
| 2004 | DATE | Are Our Design for Testability Features Fault Secure? | Cecilia Metra, T. M. Mak, Martin Omaa |
| 2004 | IOLTS | Low-Area On-Chip Circuit for Jitter Measurement in a Phase-Locked Loop. | Jos Manuel Cazeaux, Martin Omaa, Cecilia Metra |
| 2004 | IOLTS | New High Speed CMOS Self-Checking Voter. | Jos Manuel Cazeaux, Daniele Rossi, Cecilia Metra |
| 2004 | IOLTS | Hardware Reconfiguration Scheme for High Availability Systems. | Cecilia Metra, A. Ferrari, Martin Omaa, Andrea Pagni |
| 2004 | IOLTS | Impact of ECCs on Simultaneously Switching Output Noise for On-Chip Busses of High Reliability Systems. | Daniele Rossi, A. Muccio, Andr K. Nieuwland, Atul Katoch, Cecilia Metra |
| 2004 | ITC | Risks Associated with Faults within Test Pattern Compactors and Their Implications on Testing. | Cecilia Metra, T. M. Mak, Martin Omaa |
| 2003 | DATE | High Speed and Highly Testable Parallel Two-Rail Code Checker. | Martin Omaa, Daniele Rossi, Cecilia Metra |
| 2003 | IOLTS | A Model for Transient Fault Propagation in Combinatorial Logic. | Martin Omaa, Giacinto Papasso, Daniele Rossi, Cecilia Metra |
| 2003 | IOLTS | Power Consumption of Fault Tolerant Codes: the Active Elements. | Daniele Rossi, Steven V. E. S. van Dijk, Richard P. Kleihorst, Andr K. Nieuwland, Cecilia Metra |
| 2003 | IOLTS | Crosstalk Effect Minimization for Encoded Busses. | L. Di Silvio, Daniele Rossi, Cecilia Metra |
| 2003 | ITC | Novel Transient Fault Hardened Static Latch. | Martin Omaa, Daniele Rossi, Cecilia Metra |
| 2002 | DATE | Problems Due to Open Faults in the Interconnections of Self-Checking Data-Paths. | Michele Favalli, Cecilia Metra |
| 2002 | DATE | Self-Checking Scheme for the On-Line Testing of Power Supply Noise. | Cecilia Metra, Luca Schiano, Bruno Ricc, Michele Favalli |
| 2002 | IOLTS | Coding Scheme for Low Energy Consumption Fault-Tolerant Bus. | Daniele Rossi, Steven V. E. S. van Dijk, Richard P. Kleihorst, A. H. Nieuwland, Cecilia Metra |
| 2002 | IOLTS | Fast and Compact Error Correcting Scheme for Reliable Multilevel Flash Memories. | Daniele Rossi, Cecilia Metra, Bruno Ricc |
| 2002 | IOLTS | Design and Implementation of a Self-Checking Scheme for Railway Trackside Systems. | Luca Schiano, Cecilia Metra, Diego Marino |
| 2002 | ITC | Clock Faults? Impact on Manufacturing Testing and Their Possible Detection Through On-Line Testing. | Cecilia Metra, Stefano Di Francescantonio, T. M. Mak |
| 2001 | DATE | Optimization of error detecting codes for the detection of crosstalk originated errors. | Michele Favalli, Cecilia Metra |
| 2001 | IOLTS | Novel Fault-Tolerant Adder Design for FPGA-Based Systems. | Monica Alderighi, Sergio D'Angelo, Giacomo R. Sechi, Cecilia Metra |
| 2001 | IOLTS | Single Output Distributed Two-Rail Checker with Diagnosing Capabilities for Bus Based Self-Checking Architectures. | Michele Favalli, Cecilia Metra |
| 2001 | ITC | On-line testing of transient and crosstalk faults affecting interconnections of FPGA-implemented systems. | Cecilia Metra, Andrea Pagano, Bruno Ricc |
| 2000 | DATE | On-Line Testing and Diagnosis of Bus Lines with respect to Intermediate Voltage Values. | Cecilia Metra, Michele Favalli, Bruno Ricc |
| 1999 | DATE | On the Design of Self-Checking Functional Units Based on Shannon Circuits. | Michele Favalli, Cecilia Metra |
| 1999 | ITC | Self-checking scheme for very fast clocks' skew correction. | Cecilia Metra, Flavio Giovanelli, Mani Soma, Bruno Ricc |
| 1998 | DATE | Highly Testable and Compact 1-out-of-n Code Checker with Single Output. | Cecilia Metra, Michele Favalli, Bruno Ricc |
| 1998 | DATE | Novel Technique for Testing FPGAs. | Cecilia Metra, Michel Renovell, Giovanni A. Mojoli, Jean-Michel Portal, Sandro Pastore, Joan Figueras, Yervant Zorian, Davide Salvi, Giacomo R. Sechi |
| 1998 | ITC | On-line detection of logic errors due to crosstalk, delay, and transient faults. | Cecilia Metra, Michele Favalli, Bruno Ricc |
| 1997 | DATE | Testing scheme for IC's clocks. | Michele Favalli, Cecilia Metra |
| 1997 | ITC | On-Line Testing Scheme for Clock's Faults. | Cecilia Metra, Michele Favalli, Bruno Ricc |
| 1997 | VTS | Highly testable and compact single output comparator. | Cecilia Metra, Michele Favalli, Bruno Ricc |
| 1996 | VTS | Embedded two-rail checkers with on-line testing ability. | Cecilia Metra, Michele Favalli, Bruno Ricc |
| 1992 | ITC | CMOS Checkers with Testable Bridging and Transistor Stuck-on Faults. | Cecilia Metra, Michele Favalli, Piero Olivo, Bruno Ricc |