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Chi-Ying Tsui

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

134

Venues

15

Active years

1992–2026

Best venue rank

A*

Where they publish

Papers

134 indexed papers, newest first.

YearVenueTitleAuthors
2026ASPDACExploiting the Irregular Input Sparsity in Systolic Array-based DNN Accelerators via Local Soft Pooling.Desheng Fu, Jingbo Jiang, Xiaomeng Wang, Jingyang Zhu, Xizi Chen, Chi-Ying Tsui
2026DATEDS-CIM: Digital Stochastic Computing-In-Memory Featuring Accurate OR-Accumulation via Sample Region Remapping for Edge AI Models.Kunming Shao, Liang Zhao, Jiangnan Yu, Zhipeng Liao, Xiaomeng Wang, Yi Zou, Tim Kwang-Ting Cheng, Chi-Ying Tsui
2026ISCASBioSeek: A Design Generation Framework of Biosignal Processors with Large-Language Models for Edge Healthcare Applications.Fengshi Tian, Jiakun Zheng, Hui Wu, Zilu Liu, Jinbo Chen, Shiqi Zhao, Jie Yang, Mohamad Sawan, Chi-Ying Tsui, Kwang-Ting (Tim) Cheng
2025DATESynDCIM: A Performance-Aware Digital Computing-in-Memory Compiler with Multi-Spec-Oriented Subcircuit Synthesis.Kunming Shao, Fengshi Tian, Xiaomeng Wang, Jiakun Zheng, Jia Chen, Jingyu He, Hui Wu, Jinbo Chen, Xihao Guan, Yi Deng, Fengbin Tu, Jie Yang, Mohamad Sawan, Kwang-Ting (Tim) Cheng, Chi-Ying Tsui
2025GLOBECOMLDPC Code Optimisation for OTFS Modulation with MP Detection.Chong Zhang, Shenghui Song, Chi-Ying Tsui, Jinhong Yuan
2025GLOBECOMFAS-RIS-Aided Multi-User Systems With Linear Precoding: Random Matrix Analysis and Two-Timescale Design.Xin Zhang, Dongfang Xu, Jingjing Wang, Shenghui Song, Chi-Ying Tsui, Derrick Wing Kwan Ng, Mrouane Debbah
2025ISCASDPE-CIM: Compute-In-Memory Accelerator using Dynamic Posit Encoding and Speculative Alignment.Jingyu He, Kwang-Ting Cheng, Chi-Ying Tsui
2025ISCASA Dual-Mode One-stage RTsz Fai Kwok, Yuan Yao, Pok Man Leung, Wing-Hung Ki, Chi-Ying Tsui
2025ISCASAnalysis and Prevention of Coupling-Dependent Data Flipping in Series-Series Resonant Wireless Power Transfer Systems.Yuan Yao, Sayan Sarkar, Fengshi Tian, Wing-Hung Ki, Chi-Ying Tsui, Yang Liu
2025ISCASA Flexible Precision Scaling Deep Neural Network Accelerator with Efficient Weight Combination.Liang Zhao, Kunming Shao, Fengshi Tian, Kwang-Ting (Tim) Cheng, Chi-Ying Tsui, Yi Zou
2025ISCASNeuroEye: A 54.59mW, 12200FPS Event-Driven Near-Sensor Eye-Tracking Processor with Pipelined Spatial-Temporal Spike-Streaming.Jiakun Zheng, Fengshi Tian, Jinbo Chen, Chaoming Fang, Yuan Yao, Jie Yang, Mohamad Sawan, Kwang-Ting (Tim) Cheng, Chi-Ying Tsui
2025ISLPEDDIRC-RAG: Accelerating Edge RAG with Robust High-Density and High-Loading-Bandwidth Digital In-ReRAM Computation.Kunming Shao, Zhipeng Liao, Jiangnan Yu, Liang Zhao, Qiwei Li, Xijie Huang, Jingyu He, Fengshi Tian, Yi Zou, Xiaomeng Wang, Kwang-Ting (Tim) Cheng, Chi-Ying Tsui
2024DACRWriC: A Dynamic Writing Scheme for Variation Compensation for RRAM-based In-Memory Computing.Yucong Huang, Jingyu He, Kwang-Ting (Tim) Cheng, Chi-Ying Tsui, Terry Tao Ye
2024DATEAdaP-CIM: Compute-in-Memory Based Neural Network Accelerator Using Adaptive Posit.Jingyu He, Fengbin Tu, Kwang-Ting Cheng, Chi-Ying Tsui
2024ICCADReSCIM: Variation-Resilient High Weight-Loading Bandwidth In-Memory Computation Based on Fine-Grained Hybrid Integration of Multi-Level ReRAM and SRAM Cells.Xiaomeng Wang, Jingyu He, Kunming Shao, Jiakun Zheng, Fengshi Tian, Kwang-Ting (Tim) Cheng, Chi-Ying Tsui
2024ISCASTime Domain Analysis of Secondary Stage With Series Resonance Driving Rectifier Load.Wing-Hung Ki, Yuan Yao, Chi-Ying Tsui
2024ISCASAdaptive Digitally-Controlled Active Rectifier-Based Receiver for Bioimplants.Sayan Sarkar, Yuan Yao, Wing-Hung Ki, Chi-Ying Tsui
2024ISCASBOLS: A Bionic Sensor-direct On-chip Learning System with Direct-Feedback-Through-Time for Personalized Wearable Health Monitoring.Fengshi Tian, Jiakun Zheng, Jingyu He, Jinbo Chen, Xiaomeng Wang, Chaoming Fang, Jie Yang, Mohamad Sawan, Chi-Ying Tsui, Kwang-Ting Cheng
2024WCNCHow Robust is Federated Learning to Communication Error? A Comparison Study Between Uplink and Downlink Channels.Linping Qu, Shenghui Song, Chi-Ying Tsui, Yuyi Mao
2023ASPDACRVComp: Analog Variation Compensation for RRAM-Based in-Memory Computing.Jingyu He, Yucong Huang, Miguel Angel Lastras-Montao, Terry Tao Ye, Chi-Ying Tsui, Kwang-Ting Cheng
2023DACLate Breaking Results: Weight Decay is ALL You Need for Neural Network Sparsification.Xizi Chen, Rui Pan, Xiaomeng Wang, Fengshi Tian, Chi-Ying Tsui
2023DACAutoDCIM: An Automated Digital CIM Compiler.Jia Chen, Fengbin Tu, Kunming Shao, Fengshi Tian, Xiao Huo, Chi-Ying Tsui, Kwang-Ting Cheng
2023GLOBECOMStep-GRAND: A Low Latency Universal Soft-Input Decoder.Syed Mohsin Abbas, Chi-Ying Tsui, Marwan Jalaleddine, Warren J. Gross
2022GLOBECOMFedDQ: Communication-Efficient Federated Learning with Descending Quantization.Linping Qu, Shenghui Song, Chi-Ying Tsui
2022ISCASA 16-bit Encrypted On-chip Embedded System for Implantable Medical Devices.Sayan Sarkar, Jingbo Jiang, Wing-Hung Ki, Chi-Ying Tsui
2022ISCASDesign Strategy of Off-Resonant Tertiary Coils for Uplink Detection in Biomedical Implants.Sayan Sarkar, Yuan Yao, Wing-Hung Ki, Chi-Ying Tsui
2020ASPDACDesign of a Single-Stage Wireless Charger with 92.3%-Peak-Efficiency for Portable Devices Applications.Lin Cheng, Xinyuan Ge, Wai Chiu Ng, Wing-Hung Ki, Jiawei Zheng, Tsz Fai Kwok, Chi-Ying Tsui, Ming Liu
2020DACTight Compression: Compressing CNN Model Tightly Through Unstructured Pruning and Simulated Annealing Based Permutation.Xizi Chen, Jingyang Zhu, Jingbo Jiang, Chi-Ying Tsui
2019ASPDACCompRRAE: RRAM-based convolutional neural network accelerator with reduced computations through a runtime activation estimation.Xizi Chen, Jingyang Zhu, Jingbo Jiang, Chi-Ying Tsui
2019ISCASA Two-Staged Adaptive Successive Cancellation List Decoding for Polar Codes.ChenYang Xia, YouZhe Fan, Chi-Ying Tsui
2018ASPDACA high-throughput and energy-efficient RRAM-based convolutional neural network using data encoding and dynamic quantization.Xizi Chen, Jingbo Jiang, Jingyang Zhu, Chi-Ying Tsui
2018DATESparseNN: An energy-efficient neural network accelerator exploiting input and output sparsity.Jingyang Zhu, Jingbo Jiang, Xizi Chen, Chi-Ying Tsui
2018ISCASAn Indoor Solar Energy Harvester with Ultra-Low-Power Reconfigurable Power-On-Reset-Styled Voltage Detector.Xiaodong Meng, Xing Li, Yuan Yao, Chi-Ying Tsui, Wing-Hung Ki
2018ISCASOn Path Memory in List Successive Cancellation Decoder of Polar Codes.ChenYang Xia, YouZhe Fan, Ji Chen, Chi-Ying Tsui
2018ISCASRoom-Temperature Dual-mode CMOS Gas-FET Sensor for Diabetes Detection.Qian Yu, Farid Boussad, Amine Bermak, Chi-Ying Tsui
2017ASPDACA wireless power receiver with a 3-level reconfigurable resonant regulating rectifier for mobile-charging applications.Lin Cheng, Wing-Hung Ki, Chi-Ying Tsui
2017ASPDACBHNN: A memory-efficient accelerator for compressing deep neural networks with blocked hashing techniques.Jingyang Zhu, Zhiliang Qian, Chi-Ying Tsui
2017FPLAn implementation of list successive cancellation decoder with large list size for polar codes.ChenYang Xia, YouZhe Fan, Ji Chen, Chi-Ying Tsui, ChongYang Zeng, Jie Jin, Bin Li
2017ISCASConcatenated LDPC-polar codes decoding through belief propagation.Syed Mohsin Abbas, YouZhe Fan, Ji Chen, Chi-Ying Tsui
2017ISCASDual transduction Gas sensor based on a surface acoustic wave resonator.Feng Gao, Amine Bermak, Chi-Ying Tsui, Farid Boussad
2016ASPDACLRADNN: High-throughput and energy-efficient Deep Neural Network accelerator using Low Rank Approximation.Jingyang Zhu, Zhiliang Qian, Chi-Ying Tsui
2016GLOBECOMLow-Complexity List Successive-Cancellation Decoding of Polar Codes Using List Pruning.Ji Chen, YouZhe Fan, ChenYang Xia, Chi-Ying Tsui, Jie Jin, Kai Chen, Bin Li
2016ISCASHardware decoders for polar codes: An overview.Pascal Giard, Gabi Sarkis, Alexios Balatsoukas-Stimming, YouZhe Fan, Chi-Ying Tsui, Andreas Peter Burg, Claude Thibeault, Warren J. Gross
2016ISCASAn indoor solar energy harvesting system using dual mode SIDO converter with fully digital time-based MPPT.Xiaodong Meng, Xing Li, Chi-Ying Tsui, Wing-Hung Ki
2016ISCASA WLAN 2.4-GHz RF energy harvesting system with reconfigurable rectifier for wireless sensor network.Zizhen Zeng, Xing Li, Amine Bermak, Chi-Ying Tsui, Wing-Hung Ki
2016ISCASA low-power chopper bandpass amplifier for biopotential sensors.Jiawei Zheng, Wing-Hung Ki, Chi-Ying Tsui
2015ICASSPLow-latency list decoding of polar codes with double thresholding.YouZhe Fan, Ji Chen, ChenYang Xia, Chi-Ying Tsui, Jie Jin, Hui Shen, Bin Li
2015ISCASA fast variable block size motion estimation algorithm with refined search range for a two-layer data reuse scheme.Luheng Jia, Chi-Ying Tsui, Oscar C. Au, Amin Zheng
2015ISCASUHF energy harvesting system using reconfigurable rectifier for wireless sensor network.Xing Li, Chi-Ying Tsui, Wing-Hung Ki
2014ASPDACA comprehensive and accurate latency model for Network-on-Chip performance analysis.Zhiliang Qian, Da-Cheng Juan, Paul Bogdan, Chi-Ying Tsui, Diana Marculescu, Radu Marculescu
2014DACDisease Diagnosis-on-a-Chip: Large Scale Networks-on-Chip based Multicore Platform for Protein Folding Analysis.Yuankun Xue, Zhiliang Qian, Paul Bogdan, Fan Ye, Chi-Ying Tsui
2014ISCASLow-latency MAP demapper architecture for coded modulation with iterative decoding.YouZhe Fan, Chi-Ying Tsui
2014ISCASAn adaptive wireless powering and data telemetry system for optic nerve stimulation.Xing Li, Yan Lu, Chi-Ying Tsui, Wing-Hung Ki
2014MMSPA fast intermode decision algorithm based on analysis of inter prediction residual.Luheng Jia, Oscar C. Au, Chi-Ying Tsui, Wei Dai, Pengfei Wan
2013DATESVR-NoC: a performance analysis tool for network-on-chips using learning-based support vector regression model.Zhiliang Qian, Da-Cheng Juan, Paul Bogdan, Chi-Ying Tsui, Diana Marculescu, Radu Marculescu
2013ICCADPerformance evaluation of multicore systems: from traffic analysis to latency predictions (embedded tutorial).Zhiliang Qian, Paul Bogdan, Chi-Ying Tsui, Radu Marculescu
2012DATEA flit-level speedup scheme for network-on-chips using self-reconfigurable bi-directional channels.Zhiliang Qian, Ying Fei Teh, Chi-Ying Tsui
2012VTCLow-Complexity Rotated QAM Demapper for the Iterative Receiver Targeting DVB-T2 Standard.YouZhe Fan, Chi-Ying Tsui
2011ASPDACA thermal-aware application specific routing algorithm for Network-on-Chip design.Zhiliang Qian, Chi-Ying Tsui
2011ICIPEfficient iterative receiver for LDPC coded wireless IPTV system.YouZhe Fan, James She, Chi-Ying Tsui
2011ISCASA low-complexity image compression algorithm for Address-Event Representation (AER) PWM image sensors.Denis Guangyin Chen, Amine Bermak, Chi-Ying Tsui
2010ASPDACMaximizing the harvested energy for micro-power applications through efficient MPPT and PMU design.Hui Shao, Chi-Ying Tsui, Wing-Hung Ki
2010ISCASSystem level power optimizations for EPC RFID tags to improve sensitivity using load power shaping and operation scheduling.Yunxiao Ling, Jun Yi, Chi-Ying Tsui, Wing-Hung Ki
2009ASPDACLow energy level converter design for sub-VHui Shao, Chi-Ying Tsui
2009ASPDACAn inductor-less MPPT design for light energy harvesting systems.Hui Shao, Chi-Ying Tsui, Wing-Hung Ki
2009ISCASA Low Energy Two-step Successive Approximation Algorithm for ADC Design.Ricky Yiu-kee Choi, Chi-Ying Tsui
2009ISCASImproving the Hardware Utilization Efficiency of Partially Parallel LDPC Decoder with Scheduling and Sub-matrix Decomposition.Jie Jin, Chi-Ying Tsui
2009ISLPEDA single inductor dual input dual output DC-DC converter with hybrid supplies for solar energy harvesting applications.Hui Shao, Chi-Ying Tsui, Wing-Hung Ki
2008ISCASIntegrated single-inductor dual-input dual-output boost converter for energy harvesting applications.Ngok-Man Sze, Feng Su, Yat-Hei Lam, Wing-Hung Ki, Chi-Ying Tsui
2008ISCASAn energy-adaptive MPPT power management unit for micro-power vibration energy harvesting.Jun Yi, Feng Su, Yat-Hei Lam, Wing-Hung Ki, Chi-Ying Tsui
2008ISLPEDA low power layered decoding architecture for LDPC decoder implementation for IEEE 802.11n LDPC codes.Jie Jin, Chi-Ying Tsui
2007DACEnergy-Aware Synthesis of Networks-on-Chip Implemented with Voltage Islands.Lap-Fai Leung, Chi-Ying Tsui
2007ISCASA Batteryless Vibration-based Energy Harvesting System for Ultra Low Power Ubiquitous Applications.Chao Lu, Chi-Ying Tsui, Wing-Hung Ki
2007ISCASDesign and Implementation of a Low-power Baseband-system for RFID Tag.Adam S. W. Man, Edward S. Zhang, Hin-Tat Chan, Vincent K. N. Lau, Chi-Ying Tsui, Howard C. Luong
2007ISCASAn Inductor-less Micro Solar Power Management System Design for Energy Harvesting Applications.Hui Shao, Chi-Ying Tsui, Wing-Hung Ki
2007ISLPEDVibration energy scavenging and management for ultra low power applications.Chao Lu, Chi-Ying Tsui, Wing-Hung Ki
2007ISLPEDA micro power management system and maximum output power control for solar energy harvesting applications.Hui Shao, Chi-Ying Tsui, Wing-Hung Ki
2007VLSIDA Scalable Frame-Level Pipelined Architecture for FSBM Motion Estimation.Wei-Feng He, Meng-Lian Zhao, Chi-Ying Tsui, Zhi-Gang Mao
2006ASPDACIntegrated direct output current control switching converter using symmetrically-matched self-biased current sensors.Yat-Hei Lam, Suet-Chui Koon, Wing-Hung Ki, Chi-Ying Tsui
2006ASPDACAdaptively-biased capacitor-less CMOS low dropout regulator with direct current feedback.Yat-Hei Lam, Wing-Hung Ki, Chi-Ying Tsui
2006ASPDACUltra-low voltage power management circuit and computation methodology for energy harvesting applications.Chi-Ying Tsui, Hui Shao, Wing-Hung Ki, Feng Su
2006DACOptimal link scheduling on improving best-effort and guaranteed services performance in network-on-chip systems.Lap-Fai Leung, Chi-Ying Tsui
2006ISCASHigh performance single clock cycle CMOS comparator.Hing-mo Lam, Chi-Ying Tsui
2006ISCASEnergy-aware optimal workload allocation among the battery-powered devices to maximize the co-operation life time.Feng Liu, Chi-Ying Tsui
2006ISCASA charge based computation system and control strategy for energy harvesting applications.Hui Shao, Chi-Ying Tsui, Wing-Hung Ki
2006ISCASHigh efficiency cross-coupled doubler with no reversion loss.Feng Su, Wing-Hung Ki, Chi-Ying Tsui
2006ISLPEDA low power Viterbi decoder implementation using scarce state transition and path pruning scheme for high throughput wireless applications.Jie Jin, Chi-Ying Tsui
2006VTCLow Complexity SST Viterbi Decoder.Jin Jie, Chi-Ying Tsui
2005DATEExploiting Dynamic Workload Variation in Low Energy Preemptive Task Scheduling.Lap-Fai Leung, Chi-Ying Tsui, Xiaobo Sharon Hu
2005ISCASA threshold-based algorithm and VLSI architecture of a K-best lattice decoder for MIMO systems.Jin Jie, Chi-Ying Tsui, Wai Ho Mow
2005ISCASCharge redistribution loss consideration in optimal charge pump design.Wing-Hung Ki, Feng Su, Chi-Ying Tsui
2005ISCASGate control strategies for high efficiency charge pumps.Feng Su, Wing-Hung Ki, Chi-Ying Tsui
2004ASPDACA dual-band switching digital controller for a buck converter.Martin Yeung-Kei Chui, Wing-Hung Ki, Chi-Ying Tsui
2004ASPDACMinimizing energy consumption of multiple-processors-core systems with simultaneous task allocation, scheduling and voltage assignment.Lap-Fai Leung, Chi-Ying Tsui, Wing-Hung Ki
2004ASPDACMinimizing energy consumption of hard real-time systems with simultaneous tasks scheduling and voltage assignment using statistical data.Lap-Fai Leung, Chi-Ying Tsui, Wing-Hung Ki
2004ASPDACFast adaptive DC-DC conversion using dual-loop one-cycle control in standard digital CMOS process.Dongsheng Ma, Wing-Hung Ki, Chi-Ying Tsui
2004ASPDACPower control of CDMA systems with successive interference cancellation using the knowledge of battery power capacity.Yan Wang, Chi-Ying Tsui, Roger S. Cheng, Wai Ho Mow
2004DATERe-Configurable Bus Encoding Scheme for Reducing Power Consumption of the Cross Coupling Capacitance for Deep Sub-Micron Instruction Bus.Siu-Kei Wong, Chi-Ying Tsui
2004ISCASLeast leakage vector assisted technology mapping for total power optimization.Robert Yi-Ching Au, Chi-Ying Tsui
2004ISCASDynamic reconfigurable bus encoding scheme for reducing the energy consumption of deep sub-micron instruction bus.Siu-Kei Wong, Chi-Ying Tsui
2003ISCASDesign and implementation of high-speed arbiter for large scale VOQ crossbar switches.Chun Kit Hung, Mounir Hamdi, Chi-Ying Tsui
2003ISCASSingle-inductor dual-input dual-output switching converter for integrated battery charging and power regulation.Yat-Hei Lam, Wing-Hung Ki, Chi-Ying Tsui, Philip K. T. Mok
2003ISCASHigh performance and low power completion detection circuit.Hing-mo Lam, Chi-Ying Tsui
2003ISCASSimultaneous task allocation, scheduling and voltage assignment for multiple-processors-core systems using mixed integer nonlinear programming.Lap-Fai Leung, Chi-Ying Tsui, Wing-Hung Ki
2002HOTIStable Round-Robin Scheduling Algorithms for High-Performance Input Queued Switches.Jing Liu, Chun Kit Hung, Mounir Hamdi, Chi-Ying Tsui
2002ISCASLow complexity OFDM receiver using Log-FFT for coded OFDM system.Yan Wang, Hing Mo Lam, Chi-Ying Tsui, Roger S. Cheng, Wai Ho Mow
2002ISCASA VLSI architecture of a K-best lattice decoding algorithm for MIMO channels.Kwan-wai Wong, Chi-Ying Tsui, Roger S.-K. Cheng, Wai Ho Mow
2002VTCPerformance study of OFDM receiver using FFT based on log number system.Yan Wang, Chi-Ying Tsui, Roger S. Cheng, Wai Ho Mow
2001ASPDACA single-inductor dual-output integrated DC/DC boost converter for variable voltage scheduling.Dongsheng Ma, Wing-Hung Ki, Chi-Ying Tsui, Philip K. T. Mok
2001ISCASSingle-inductor multiple-output switching converters with bipolar outputs.Dongsheng Ma, Wing-Hung Ki, Philip K. T. Mok, Chi-Ying Tsui
2000ASPDACVLSI implementation of rake receiver for IS-95 CDMA Testbed using FPGA.Oliver Yuk-Hang Leung, Chi-Ying Tsui, Roger S. Cheng
2000ASPDACVLSI implementation of a switch fabric for mixed ATM and IP traffic.Chi-Ying Tsui, Louis Chung-Yin Kwan, Chin-Tau Lea
2000GLOBECOMComposite interference cancellation scheme for CDMA systems.Billy Chi-Kin Poon, Chi-Ying Tsui, Roger S. Cheng
2000ICASSPA reduced complexity implementation of the Log-Map algorithm for turbo-codes decoding.Yan Wang, Chi-Ying Tsui, Roger Shu-Kwan Cheng
2000ISCASA low power VLSI architecture of SOVA-based turbo-code decoder using scarce state transition scheme.Yan Wang, Chi-Ying Tsui, Roger S. Cheng
2000ISCASLow complexity VLSI implementation of a joint successive interference cancellation with interleaving scheme.Bob Ka-Man Wong, Chi-Ying Tsui, Roger S.-K. Cheng
2000WCNCA low complexity architecture of the V-BLAST system.Wong Kwan Wai, Chi-Ying Tsui, Roger S. Cheng
1999ASPDACTiming Optimization of Logic Network Using Gate Duplication.Chun-hong Chen, Chi-Ying Tsui
1999ASPDACAn Integrated Battery-Hardware Model for Portable Electronics.Massoud Pedram, Chi-Ying Tsui, Qing Wu
1999ISCASFinite state machine partitioning for low power.Wai-Kwong Lee, Chi-Ying Tsui
1999ISCASLow power ACS unit design for the Viterbi decoder [CDMA wireless systems].Chi-Ying Tsui, Roger Shu-Kwan Cheng, Curtis Ling
1999ISCASUnequal error protection for wireless transmission of MPEG audio.Chi Wai Yung, Hung Fai Fu, Chi-Ying Tsui, Roger S. Cheng, D. George
1999ISLPEDReducing power consumption of turbo code decoder using adaptive iteration with variable supply voltage.Oliver Yuk-Hang Leung, Chung-Wai Yue, Chi-Ying Tsui, Roger S. Cheng
1999WCNCAdaptive tracking of optimal bit and power allocation for OFDM systems in time-varying channels.Sai Kit Lai, Roger S. Cheng, Khaled Ben Letaief, Chi-Ying Tsui
1998ISLPEDTowards the capability of providing power-area-delay trade-off at the register transfer level.Chun-hong Chen, Chi-Ying Tsui
1997DACA Power Estimation Framework for Designing Low Power Portable Video Applications.Chi-Ying Tsui, Kai-Keung Chan, Qing Wu, Chih-Shun Ding, Massoud Pedram
1997ICASSPAn efficient and reconfigurable VLSI architecture for different block matching motion estimation algorithms.Xiao-Dong Zhang, Chi-Ying Tsui
1997ISLPEDLow power motion estimation design using adaptive pixel truncation.Zhong-Li He, Kai-Keung Chan, Chi-Ying Tsui, Ming L. Liou
1996DACImproving the Efficiency of Power Simulators by Input Vector Compaction.Chi-Ying Tsui, Radu Marculescu, Diana Marculescu, Massoud Pedram
1994DACExact and Approximate Methods for Calculating Signal and Transition Probabilities in FSMs.Chi-Ying Tsui, Massoud Pedram, Alvin M. Despain
1994ICCADLow power state assignment targeting two-and multi-level logic implementations.Chi-Ying Tsui, Massoud Pedram, Chih-Ang Chen, Alvin M. Despain
1993DACTechnology Decomposition and Mapping Targeting Low Power Dissipation.Chi-Ying Tsui, Massoud Pedram, Alvin M. Despain
1993ICCADEfficient estimation of dynamic power consumption under a real delay model.Chi-Ying Tsui, Massoud Pedram, Alvin M. Despain
1992DACApplication-Driven Design Automation for Microprocessor Design.Iksoo Pyo, Ching-Long Su, Ing-Jer Huang, Kuo-Rueih Pan, Yong-Seon Koh, Chi-Ying Tsui, Hsu-Tsun Chen, Gino Cheng, Shihming Liu, Shiqun Wu, Alvin M. Despain