Christian Landrault
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
44
Venues
10
Active years
1992–2009
Best venue rank
A*
Where they publish
Papers
44 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2009 | ETS | Something I Always Wanted to Know About Test, But Was Afraid to Ask. | Christian Landrault |
| 2008 | IOLTS | Yield Improvement, Fault-Tolerance to the Rescue?. | Julien Vial, Alberto Bosio, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel |
| 2008 | ITC | SoC Yield Improvement: Redundant Architectures to the Rescue? | Julien Vial, Alberto Bosio, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel |
| 2007 | DATE | Slow write driver faults in 65nm SRAM technology: analysis and March test solution. | Alexandre Ney, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian |
| 2007 | DDECS | A Mixed Approach for Unified Logic Diagnosis. | Alexandre Rousset, Alberto Bosio, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel |
| 2007 | ETS | Electrical Simulation Model of the 2T-FLOTOX Core-Cell for Defect Injection and Faulty Behavior Prediction in eFlash Memories. | Olivier Ginez, Jean Michel Daga, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel |
| 2007 | ETS | Dynamic Two-Cell Incorrect Read Fault Due to Resistive-Open Defects in the Sense Amplifiers of SRAMs. | Alexandre Ney, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian |
| 2007 | ETS | DERRIC: A Tool for Unified Logic Diagnosis. | Alexandre Rousset, Alberto Bosio, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel |
| 2007 | ITC | A concurrent approach for testing address decoder faults in eFlash memories. | Olivier Ginez, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel, Jean Michel Daga |
| 2007 | VTS | Retention and Reliability Problems in Embedded Flash Memories: Analysis and Test of Defective 2T-FLOTOX Tunnel Window. | Olivier Ginez, Jean Michel Daga, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel |
| 2007 | VTS | Un-Restored Destructive Write Faults Due to Resistive-Open Defects in the Write Driver of SRAMs. | Alexandre Ney, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian |
| 2006 | VTS | An Overview of Failure Mechanisms in Embedded Flash Memories. | Olivier Ginez, Jean Michel Daga, Marylene Combe, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel |
| 2004 | DATE | Design of Routing-Constrained Low Power Scan Chains. | Yannick Bonhomme, Patrick Girard, Los Guiller, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel |
| 2003 | ITC | Efficient Scan Chain Design for Power Minimization During Scan Testing Under Routing Constraint. | Yannick Bonhomme, Patrick Girard, Los Guiller, Christian Landrault, Serge Pravossoudovitch |
| 2002 | ITC | Power Driven Chaining of Flip-Flops in Scan Architectures. | Yannick Bonhomme, Patrick Girard, Christian Landrault, Serge Pravossoudovitch |
| 2002 | VTS | On Using Efficient Test Sequences for BIST. | Ren David, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel |
| 2001 | ETS | On hardware generation of random single input change test sequences. | Ren David, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel |
| 2001 | IOLTS | A Gated Clock Scheme for Low Power Scan-Based BIST. | Yannick Bonhomme, Patrick Girard, Los Guiller, Christian Landrault, Serge Pravossoudovitch |
| 2001 | VTS | A Modified Clock Scheme for a Low Power BIST Test Pattern Generator. | Patrick Girard, Los Guiller, Christian Landrault, Serge Pravossoudovitch, Hans-Joachim Wunderlich |
| 2000 | ETS | Delay fault testing: choosing between random SIC and random MIC test sequences. | Arnaud Virazel, Ren David, Patrick Girard, Christian Landrault, Serge Pravossoudovitch |
| 2000 | IOLTS | Comparison between Random and Pseudo-Random Generation for BIST of Delay, Stuck-at and Bridging Faults. | Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel |
| 2000 | ITC | Low power BIST design by hypergraph partitioning: methodology and architectures. | Patrick Girard, Christian Landrault, Los Guiller, Serge Pravossoudovitch |
| 2000 | VTS | Hidden Markov and Independence Models with Patterns for Sequential BIST. | Laurent Brhlin, Olivier Gascuel, Gilles Caraux, Patrick Girard, Christian Landrault |
| 1999 | DATE | Efficient 3D Modelling for Extraction of Interconnect Capacitances in Deep Submicron Dense Layouts. | A. Toulouse, David Bernard, Christian Landrault, Pascal Nouet |
| 1999 | ETS | On calculating efficient LFSR seeds for built-in self test. | Christophe Fagot, Olivier Gascuel, Patrick Girard, Christian Landrault |
| 1999 | ETS | Partial set for flip-flops based on state requirement for non-scan BIST scheme. | Marie-Lise Flottes, Christian Landrault, A. Petitqueux |
| 1999 | ETS | Low power BIST by filtering non-detecting vectors. | Salvador Manich, A. Gabarr, M. Lopez, Joan Figueras, Patrick Girard, Los Guiller, Christian Landrault, Serge Pravossoudovitch, Joo Paulo Teixeira, Marcelino B. Santos |
| 1999 | ISCAS | Low-energy BIST design: impact of the LFSR TPG parameters on the weighted switching activity. | Patrick Girard, Los Guiller, Christian Landrault, Serge Pravossoudovitch, Joan Figueras, Salvador Manich, Joo Paulo Teixeira, Marcelino B. Santos |
| 1999 | VTS | A Test Vector Inhibiting Technique for Low Energy BIST Design. | Patrick Girard, Los Guiller, Christian Landrault, Serge Pravossoudovitch |
| 1997 | ISLPED | A gate resizing technique for high reduction in power consumption. | Patrick Girard, Christian Landrault, Serge Pravossoudovitch, D. Severac |
| 1997 | ITC | On Using Machine Learning for Logic BIST. | Christophe Fagot, Patrick Girard, Christian Landrault |
| 1997 | VTS | Hardware Test: Can We Learn from Software Testing? | J. Abraham, Phyllis G. Frankl, Christian Landrault, Meryem Marzouki, Paolo Prinetto, Chantal Robach, Pascale Thvenod-Fosse |
| 1997 | VTS | An optimized BIST test pattern generator for delay testing. | Patrick Girard, Christian Landrault, V. Moreda, Serge Pravossoudovitch |
| 1996 | DATE | DFSIM: A Gate-Delay Fault Simulator for Sequential Circuits. | P. Cavallera, Patrick Girard, Christian Landrault, Serge Pravossoudovitch |
| 1996 | ITC | A Diagnostic ATPG for Delay Faults Based on Genetic Algorithms. | Patrick Girard, Christian Landrault, Serge Pravossoudovitch, B. Rodriguez |
| 1996 | VTS | A new test pattern generation method for delay fault testing. | S. Cremoux, Christophe Fagot, Patrick Girard, Christian Landrault, Serge Pravossoudovitch |
| 1995 | DATE | A trace-based method for delay fault diagnosis in synchronous sequential circuits. | Patrick Girard, Christian Landrault, Serge Pravossoudovitch, B. Rodriguez |
| 1995 | ITC | Is High-Level Test Synthesis Just Design for Test? | Christian Landrault, Marie-Lise Flottes, Bruno Rouzeyre |
| 1995 | VTS | Diagnostic of path and gate delay faults in non-scan sequential circuits. | Patrick Girard, Christian Landrault, Serge Pravossoudovitch, B. Rodriguez |
| 1993 | ITC | An Implicit Delay-Fault Simulation Method with Approximate Detection Threshold Calculation. | D. Dumas, Patrick Girard, Christian Landrault, Serge Pravossoudovitch |
| 1992 | DAC | A Novel Approach to Delay-Fault Diagnosis. | Patrick Girard, Christian Landrault, Serge Pravossoudovitch |
| 1992 | VLSID | A New Reliable Method for Delay-Fault Diagnosis. | Marie-Lise Flottes, Patrick Girard, Christian Landrault, Serge Pravossoudovitch |
| 1992 | VLSID | Quasi-Linear FSMS and their Application to the Generation of Deterministic and Pseudo-random Test Vectors. | Lew Fock Chong Lew Yan Voon, Christian Dufaza, Christian Landrault |
| 1992 | VTS | BIST linear generator based on complemented outputs. | Lew Fock Chong Lew Yan Voon, Christian Dufaza, Christian Landrault |