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Dennis Sylvester

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

137

Venues

16

Active years

1998–2026

Best venue rank

A*

Where they publish

Papers

137 indexed papers, newest first.

YearVenueTitleAuthors
2026HPCAPinball: A Cryogenic Predecoder for Quantum Error Correction Decoding Under Circuit-Level Noise.Alexander Knapen, Guanchen Tao, Jacob Mack, Tomas Bruno, Mehdi Saligane, Dennis Sylvester, Qirui Zhang, Gokul Subramanian Ravi
2026HPDCAccelerating Block Low-Rank Foundation Model Inference on Memory-Constrained GPUs.Pierre Abillama, Changwoo Lee, Juechu Dong, David T. Blaauw, Dennis Sylvester, Hun-Seok Kim
2025DACSQ-DM: Accelerating Diffusion Models with Aggressive Quantization and Temporal Sparsity.Zichen Fan, Steve Dai, Rangharajan Venkatesan, Dennis Sylvester, Brucek Khailany
2024ICCADReinforcement Learning-Enhanced Cloud-Based Open Source Analog Circuit Generator for Standard and Cryogenic Temperatures in 130-nm and 180-nm OpenPDKs.Ali Hammoud, Anhang Li, Wen Tian, Ayushman Tripathi, Harsh Khandeparkar, Ryan Wans, Gregory Kielian, Boris Murmann, Dennis Sylvester, Mehdi Saligane
2024ICCADConSmax: Hardware-Friendly Alternative Softmax with Learnable Parameters.Shiwei Liu, Guanchen Tao, Yifei Zou, Derek Chow, Zichen Fan, Kauna Lei, Bangfei Pan, Dennis Sylvester, Gregory Kielian, Mehdi Saligane
2023ISCATaskFusion: An Efficient Transfer Learning Architecture with Dual Delta Sparsity for Multi-Task Natural Language Processing.Zichen Fan, Qirui Zhang, Pierre Abillama, Sara Shoouri, Changwoo Lee, David T. Blaauw, Hun-Seok Kim, Dennis Sylvester
2019DATEIoTSechang Oh, Minchang Cho, Xiao Wu, Yejoong Kim, Li-Xuan Chuo, Wootaek Lim, Pat Pannuto, Suyoung Bang, Kaiyuan Yang, Hun-Seok Kim, Dennis Sylvester, David T. Blaauw
2018ASPDACA 42nJ/conversion on-demand state-of-charge indicator for miniature IoT Li-ion batteries.Junwon Jeong, Seokhyeon Jeong, Chulwoo Kim, Dennis Sylvester, David T. Blaauw
2018ASPDACEdge pursuit comparator with application in a 74.1dB SNDR, 20KS/s 15b SAR ADC.Minseob Shim, Seokhyeon Jeong, Paul D. Myers, Suyoung Bang, Junhua Shen, Chulwoo Kim, Dennis Sylvester, David T. Blaauw, Wanyeong Jung
2018ISCANeural Cache: Bit-Serial In-Cache Acceleration of Deep Neural Networks.Charles Eckert, Xiaowei Wang, Jingcheng Wang, Arun Subramaniyan, Ravi R. Iyer, Dennis Sylvester, David T. Blaauw, Reetuparna Das
2017ISCASRectified-linear and recurrent neural networks built with spin devices.Qing Dong, Kaiyuan Yang, Laura Fick, David T. Blaauw, Dennis Sylvester
2017ISCASA 25 Gb/s 470 μW active inductor equalizer for ground referenced signaling receivers.Laura Fick, Dennis Sylvester, John W. Poulton, John M. Wilson, C. Thomas Gray
2017MICROCache automaton.Arun Subramaniyan, Jingcheng Wang, Ezhil R. M. Balasubramanian, David T. Blaauw, Dennis Sylvester, Reetuparna Das
2017MOBICOMRF-Echo: A Non-Line-of-Sight Indoor Localization System Using a Low-Power Active RF Reflector ASIC Tag.Li-Xuan Chuo, Zhihong Luo, Dennis Sylvester, David T. Blaauw, Hun-Seok Kim
2016DACNear-threshold computing in FinFET technologies: opportunities for improved voltage scalability.Nathaniel Ross Pinckney, Lucian Shifren, Brian Cline, Saurabh Sinha, Supreet Jeloka, Ronald G. Dreslinski, Trevor N. Mudge, Dennis Sylvester, David T. Blaauw
2016SPA2: Analog Malicious Hardware.Kaiyuan Yang, Matthew Hicks, Qing Dong, Todd M. Austin, Dennis Sylvester
2015ISCASRacetrack converter: A low power and compact data converter using racetrack spintronic devices.Qing Dong, Kaiyuan Yang, Laura Fick, David Fick, David T. Blaauw, Dennis Sylvester
2014DATEEnergy efficient in-memory AES encryption based on nonvolatile domain-wall nanowire.Yuhao Wang, Hao Yu, Dennis Sylvester, Pingfan Kong
2014ISCASChip-on-mud: Ultra-low power ARM-based oceanic sensing system powered by small-scale benthic microbial fuel cells.Gyouho Kim, Adriane Wolfe, Richard Bell, Suyoung Bang, Yoonmyung Lee, Inhee Lee, Yejoong Kim, Lewis Hsu, Jeffrey Kagan, Meriah Arias-Thode, Bart Chadwick, Dennis Sylvester, David T. Blaauw
2013ICASSPA low-power VGA full-frame feature extraction processor.Dongsuk Jeon, Yejoong Kim, Inhee Lee, Zhengya Zhang, David T. Blaauw, Dennis Sylvester
2013ISCASA fully integrated switched-capacitor based PMU with adaptive energy harvesting technique for ultra-low power sensing applications.Suyoung Bang, Yoonmyung Lee, Inhee Lee, Yejoong Kim, Gyouho Kim, David T. Blaauw, Dennis Sylvester
2012ACSSCCircuits for ultra-low power millimeter-scale sensor nodes.Yoonmyung Lee, Dennis Sylvester, David T. Blaauw
2012ASPDACDesign-patterning co-optimization of SRAM robustness for double patterning lithography.Vivek Joshi, Kanak Agarwal, Dennis Sylvester
2012DACCircuit and system design guidelines for ultra-low power sensor nodes.Yoonmyung Lee, Yejoong Kim, Dongmin Yoon, David T. Blaauw, Dennis Sylvester
2012DACAssessing the performance limits of parallelized near-threshold computing.Nathaniel Ross Pinckney, Korey Sewell, Ronald G. Dreslinski, David Fick, Trevor N. Mudge, Dennis Sylvester, David T. Blaauw
2012DACHigh radix self-arbitrating switch fabric with multiple arbitration schemes and quality of service.Sudhir Satpathy, Reetuparna Das, Ronald G. Dreslinski, Trevor N. Mudge, Dennis Sylvester, David T. Blaauw
2012ISLPEDAn adaptive write word-line pulse width and voltage modulation architecture for bit-interleaved 8T SRAMs.Daeyeon Kim, Vikas Chandra, Robert C. Aitken, David T. Blaauw, Dennis Sylvester
2011DACPipeline strategy for improving optimal energy efficiency in ultra-low voltage design.Mingoo Seok, Dongsuk Jeon, Chaitali Chakrabarti, David T. Blaauw, Dennis Sylvester
2011DATEA confidence-driven model for error-resilient computing.Chia-Hsiang Chen, Yejoong Kim, Zhengya Zhang, David T. Blaauw, Dennis Sylvester, Helia Naeimi, Sumeet Sandhu
2011DATELow power interconnects for SIMD computers.Mark Woh, Sudhir Satpathy, Ronald G. Dreslinski, Danny Kershaw, Dennis Sylvester, David T. Blaauw, Trevor N. Mudge
2011ICASSPEnergy-optimized high performance FFT processor.Dongsuk Jeon, Mingoo Seok, Chaitali Chakrabarti, David T. Blaauw, Dennis Sylvester
2011ISCASA dense 45nm half-differential SRAM with lower minimum operating voltage.Gregory K. Chen, Michael Wieckowski, Daeyeon Kim, David T. Blaauw, Dennis Sylvester
2011ISCASA 1.85fW/bit ultra low leakage 10T SRAM with speed compensation scheme.Daeyeon Kim, Gregory K. Chen, Matthew Fojtik, Mingoo Seok, David T. Blaauw, Dennis Sylvester
2011ISLPEDVariation-aware static and dynamic writability analysis for voltage-scaled bit-interleaved 8-T SRAMs.Daeyeon Kim, Vikas Chandra, Robert C. Aitken, David T. Blaauw, Dennis Sylvester
2010ASPDACAnalyzing electrical effects of RTA-driven local anneal temperature variation.Vivek Joshi, Kanak Agarwal, Dennis Sylvester, David T. Blaauw
2010ASPDACDesign time body bias selection for parametric yield improvement.Cheng Zhuo, Yung-Hsu Chang, Dennis Sylvester, David T. Blaauw
2010DACClosed-form modeling of layout-dependent mechanical stress.Vivek Joshi, Valeriy Sukharev, Andres Torres, Kanak Agarwal, Dennis Sylvester, David T. Blaauw
2010DACEfficient smart monte carlo based SSTA on graphics processing units with improved resource utilization.Vineeth Veetil, Yung-Hsu Chang, Dennis Sylvester, David T. Blaauw
2010DATEA black box method for stability analysis of arbitrary SRAM cell structures.Michael Wieckowski, Dennis Sylvester, David T. Blaauw, Vikas Chandra, Sachin Idgunji, Cezary Pietrzyk, Robert C. Aitken
2010DATEProcess variation and temperature-aware reliability management.Cheng Zhuo, Dennis Sylvester, David T. Blaauw
2010ICCADAnalysis and optimization of SRAM robustness for double patterning lithography.Vivek Joshi, Kanak Agarwal, David T. Blaauw, Dennis Sylvester
2010ICCADA lower bound computation method for evaluation of statistical design techniques.Vineeth Veetil, Dennis Sylvester, David T. Blaauw
2010ICCADActive learning framework for post-silicon variation extraction and test cost reduction.Cheng Zhuo, Kanak Agarwal, David T. Blaauw, Dennis Sylvester
2010ISCASCircuit design advances to enable ubiquitous sensing environments.Mingoo Seok, Scott Hanson, Michael Wieckowski, Gregory K. Chen, Yu-Shiang Lin, David T. Blaauw, Dennis Sylvester
2010ISLPEDClock network design for ultra-low power applications.Mingoo Seok, David T. Blaauw, Dennis Sylvester
2009DACVicis: a reliable network for unreliable silicon.David Fick, Andrew DeOrio, Jin Hu, Valeria Bertacco, David T. Blaauw, Dennis Sylvester
2009DACEfficient smart sampling based full-chip leakage analysis for intra-die variation considering state dependence.Vineeth Veetil, Dennis Sylvester, David T. Blaauw, Saumil Shah, Steffen Rochel
2009DATEA highly resilient routing algorithm for fault-tolerant NoCs.David Fick, Andrew DeOrio, Gregory K. Chen, Valeria Bertacco, Dennis Sylvester, David T. Blaauw
2009ICCADPost-fabrication measurement-driven oxide breakdown reliability prediction and management.Cheng Zhuo, David T. Blaauw, Dennis Sylvester
2009ICCDInterconnect performance corners considering crosstalk noise.Ravikishore Gandikota, David T. Blaauw, Dennis Sylvester
2009ISLPEDLow power circuit design based on heterojunction tunneling transistors (HETTs).Daeyeon Kim, Yoonmyung Lee, Jin Cai, Isaac Lauer, Leland Chang, Steven J. Koester, Dennis Sylvester, David T. Blaauw
2008ASPDACInvestigation of diffusion rounding for post-lithography analysis.Puneet Gupta, Andrew B. Kahng, Youngmin Kim, Saumil Shah, Dennis Sylvester
2008ASPDACClock tree synthesis with data-path sensitivity matching.Matthew R. Guthaus, Dennis Sylvester, Richard B. Brown
2008DACModeling crosstalk in statistical static timing analysis.Ravikishore Gandikota, David T. Blaauw, Dennis Sylvester
2008DACLeakage power reduction using stress-enhanced layouts.Vivek Joshi, Brian Cline, Dennis Sylvester, David T. Blaauw, Kanak Agarwal
2008DACEfficient Monte Carlo based incremental statistical timing analysis.Vineeth Veetil, Dennis Sylvester, David T. Blaauw
2008ICCADA statistical approach for full-chip gate-oxide reliability analysis.Kaviraj Chopra, Cheng Zhuo, David T. Blaauw, Dennis Sylvester
2008ICCADSTEEL: a technique for stress-enhanced standard cell library design.Brian Cline, Vivek Joshi, Dennis Sylvester, David T. Blaauw
2008ICCADOn the decreasing significance of large standard cells in technology mapping.Jae-sun Seo, Igor L. Markov, Dennis Sylvester, David T. Blaauw
2008ISCASA robust alternate repeater technique for high performance busses in the multi-core era.Himanshu Kaul, Jae-sun Seo, Mark A. Anders, Dennis Sylvester, Ram Krishnamurthy
2008ISCASLow-voltage circuit design for widespread sensing applications.Yu-Shiang Lin, Scott Hanson, Fabio Albano, Carlos Tokunaga, Razi-Ul Haque, Kensall D. Wise, Ann Marie Sastry, David T. Blaauw, Dennis Sylvester
2008ISLPEDSingle stage static level shifter design for subthreshold to I/O voltage conversion.Yu-Shiang Lin, Dennis Sylvester
2008ISLPEDOptimal technology selection for minimizing energy and variability in low voltage applications.Mingoo Seok, Dennis Sylvester, David T. Blaauw
2008ISLPEDVariation-aware gate sizing and clustering for post-silicon optimized circuits.Cheng Zhuo, David T. Blaauw, Dennis Sylvester
2008MICROReconfigurable energy efficient near threshold cache architectures.Ronald G. Dreslinski, Gregory K. Chen, Trevor N. Mudge, David T. Blaauw, Dennis Sylvester, Krisztin Flautner
2007ASPDACSimple and Accurate Models for Capacitance Increment due to Metal Fill Insertion.Youngmin Kim, Dusan Petranovic, Dennis Sylvester
2007ASPDACRuntime leakage power estimation technique for combinational circuits.Yu-Shiang Lin, Dennis Sylvester
2007DACTop-k Aggressors Sets in Delay Noise Analysis.Ravikishore Gandikota, Kaviraj Chopra, David T. Blaauw, Dennis Sylvester, Murat R. Becer
2007DACLine-End Shortening is Not Always a Failure.Puneet Gupta, Andrew B. Kahng, Youngmin Kim, Saumil Shah, Dennis Sylvester
2007DACNanometer Device Scaling in Subthreshold Circuits.Scott Hanson, Mingoo Seok, Dennis Sylvester, David T. Blaauw
2007DACAnalysis and Optimization of Sleep Modes in Subthreshold Circuit Design.Mingoo Seok, Scott Hanson, Dennis Sylvester, David T. Blaauw
2007ICCADYield-driven near-threshold SRAM design.Gregory K. Chen, David T. Blaauw, Trevor N. Mudge, Dennis Sylvester, Nam Sung Kim
2007ICCADVictim alignment in crosstalk aware timing analysis.Ravikishore Gandikota, Kaviraj Chopra, David T. Blaauw, Dennis Sylvester, Murat R. Becer, Joao Geada
2007ICCADSoft-edge flip-flops for improved timing yield: design and optimization.Vivek Joshi, David T. Blaauw, Dennis Sylvester
2007ISLPEDA robust edge encoding technique for energy-efficient multi-cycle interconnect.Jae-sun Seo, Dennis Sylvester, David T. Blaauw, Himanshu Kaul, Ram Krishnamurthy
2007ISLPEDEnergy efficient near-threshold chip multi-processing.Bo Zhai, Ronald G. Dreslinski, David T. Blaauw, Trevor N. Mudge, Dennis Sylvester
2006ASPDACProcess-induced skew reduction in nominal zero-skew clock trees.Matthew R. Guthaus, Dennis Sylvester, Richard B. Brown
2006ASPDACPower distribution techniques for dual VDD circuits.Sarvesh H. Kulkarni, Dennis Sylvester
2006DACClock buffer and wire sizing using sequential programming.Matthew R. Guthaus, Dennis Sylvester, Richard B. Brown
2006DACReliability modeling and management in dynamic microprocessor-based systems.Eric Karl, David T. Blaauw, Dennis Sylvester, Trevor N. Mudge
2006DACVariation-aware analysis: savior of the nanometer era?Sani R. Nassif, Vijay Pitchumani, Norma Rodriguez, Dennis Sylvester, Clive Bittlestone, Riko Radojcic
2006DATEAn efficient static algorithm for computing the soft error rates of combinational circuits.Rajeev R. Rao, Kaviraj Chopra, David T. Blaauw, Dennis Sylvester
2006ICCADA new statistical max operation for propagating skewness in statistical timing analysis.Kaviraj Chopra, Bo Zhai, David T. Blaauw, Dennis Sylvester
2006ICCADA statistical framework for post-silicon tuning through body bias clustering.Sarvesh H. Kulkarni, Dennis Sylvester, David T. Blaauw
2006ICCADSoft error reduction in combinational logic using gate resizing and flipflop selection.Rajeev R. Rao, David T. Blaauw, Dennis Sylvester
2006ISCASFine grained multi-threshold CMOS for enhanced leakage reduction.Harmander Deogun, Dennis Sylvester, Kevin J. Nowka
2006ISLPEDA dual-VHarmander Deogun, Robert M. Senger, Dennis Sylvester, Richard B. Brown, Kevin J. Nowka
2006ISLPEDA new technique for jointly optimizing gate sizing and supply voltage in ultra-low energy circuits.Scott Hanson, Dennis Sylvester, David T. Blaauw
2006ISLPEDEnergy optimality and variability in subthreshold design.Scott Hanson, Bo Zhai, David T. Blaauw, Dennis Sylvester, Andres Bryant, Xinlin Wang
2005ASPDACStatistical modeling of cross-coupling effects in VLSI interconnects.Mridul Agarwal, Kanak Agarwal, Dennis Sylvester, David T. Blaauw
2005ASPDACAchieving continuous VKanak Agarwal, Dennis Sylvester, David T. Blaauw, Anirudh Devgan
2005ASPDACRuntime leakage minimization through probability-aware dual-Vt or dual-tox assignment.Dongwoo Lee, David T. Blaauw, Dennis Sylvester
2005DACAdvanced Timing Analysis Based on Post-OPC Extraction of Critical Dimensions.Puneet Gupta, Andrew B. Kahng, Youngmin Kim, Dennis Sylvester
2005DACAccurate and efficient gate-level parametric yield estimation considering correlated variations in leakage power and performance.Ashish Srivastava, Saumil Shah, Kanak Agarwal, Dennis Sylvester, David T. Blaauw, Stephen W. Director
2005DACAdvanced timing analysis based on post-OPC extraction of critical dimensions.Jie Yang, Luigi Capodieci, Dennis Sylvester
2005DATEPower-Performance Trade-Offs in Nanometer-Scale Multi-Level Caches Considering Total Leakage.Robert Bai, Nam Sung Kim, Taeho Kgil, Dennis Sylvester, Trevor N. Mudge
2005DATEDVS for On-Chip Bus Designs Based on Timing Error Correction.Himanshu Kaul, Dennis Sylvester, David T. Blaauw, Trevor N. Mudge, Todd M. Austin
2005ICCADParametric yield maximization using gate sizing based on efficient statistical power and delay gradient computation.Kaviraj Chopra, Saumil Shah, Ashish Srivastava, David T. Blaauw, Dennis Sylvester
2005ICCADDiscrete Vt assignment and gate sizing using a self-snapping continuous formulation.Saumil Shah, Ashish Srivastava, Dushyant Sharma, Dennis Sylvester, David T. Blaauw, Vladimir Zolotov
2005ISCASTiming error correction techniques for voltage-scalable on-chip memories.Eric Karl, Dennis Sylvester, David T. Blaauw
2005ISCASPower-aware global signaling strategies.Rahul M. Rao, Kanak Agarwal, Dennis Sylvester, Himanshu Kaul, Richard B. Brown, Sani R. Nassif
2005ISLPEDAnalysis and mitigation of variability in subthreshold design.Bo Zhai, Scott Hanson, David T. Blaauw, Dennis Sylvester
2005VLSIDA New Asymmetric Skewed Buffer Design for Runtime Leakage Power Reduction.Yu-Shiang Lin, Dennis Sylvester
2004ASPDACA simplified transmission-line based crosstalk noise model for on-chip RLC wiring.Kanak Agarwal, Dennis Sylvester, David T. Blaauw
2004DACVariational delay metrics for interconnect timing analysis.Kanak Agarwal, Dennis Sylvester, David T. Blaauw, Frank Liu, Sani R. Nassif, Sarma B. K. Vrudhula
2004DACToward a methodology for manufacturability-driven design rule exploration.Luigi Capodieci, Puneet Gupta, Andrew B. Kahng, Dennis Sylvester, Jie Yang
2004DACLeakage-and crosstalk-aware bus encoding for total power reduction.Harmander Deogun, Rajeev R. Rao, Dennis Sylvester, David T. Blaauw
2004DACSelective gate-length biasing for cost-effective runtime leakage control.Puneet Gupta, Andrew B. Kahng, Puneet Sharma, Dennis Sylvester
2004DACParametric yield estimation considering leakage variability.Rajeev R. Rao, Anirudh Devgan, David T. Blaauw, Dennis Sylvester
2004DACStatistical optimization of leakage power considering process variations using dual-Vth and sizing.Ashish Srivastava, Dennis Sylvester, David T. Blaauw
2004DACPower minimization using simultaneous gate sizing, dual-Vdd and dual-Vth assignment.Ashish Srivastava, Dennis Sylvester, David T. Blaauw
2004DACTradeoffs between date oxide leakage and delay for dual TAnup Kumar Sultania, Dennis Sylvester, Sachin S. Sapatnekar
2004DACTheoretical and practical limits of dynamic voltage scaling.Bo Zhai, David T. Blaauw, Dennis Sylvester, Krisztin Flautner
2004DATESimultaneous State, Vt and Tox Assignment for Total Standby Power Minimization.Dongwoo Lee, Harmander Deogun, David T. Blaauw, Dennis Sylvester
2004DATEConcurrent Sizing, Vdd and Vth Assignment for Low-Power Design.Ashish Srivastava, Dennis Sylvester, David T. Blaauw
2004ICCADA general framework for probabilistic low-power design space exploration considering process variation.Ashish Srivastava, Dennis Sylvester
2004ICCDA New Threshold Voltage Assignment Scheme for Runtime Leakage Reduction in On-Chip Repeaters.Saumil Shah, Kanak Agarwal, Dennis Sylvester
2004ICCDTransistor and Pin Reordering for Gate Oxide Leakage Reduction in Dual T{ox} Circuits.Anup Kumar Sultania, Dennis Sylvester, Sachin S. Sapatnekar
2004ISLPEDSpatial encoding circuit techniques for peak power reduction of on-chip high-performance buses.Himanshu Kaul, Dennis Sylvester, Mark A. Anders, Ram Krishnamurthy
2004ISLPEDA new algorithm for improved VDD assignment in low power dual VDD systems.Sarvesh H. Kulkarni, Ashish Srivastava, Dennis Sylvester
2004ISLPEDApproaches to run-time and standby mode leakage reduction in global buses.Rahul M. Rao, Kanak Agarwal, Dennis Sylvester, Richard B. Brown, Kevin J. Nowka, Sani R. Nassif
2003ASPDACMinimizing total power by simultaneous Vdd/Vth assignment.Ashish Srivastava, Dennis Sylvester
2003DACAn effective capacitance based driver output model for on-chip RLC interconnects.Kanak Agarwal, Dennis Sylvester, David T. Blaauw
2003DACSimple metrics for slew rate of RC circuits based on two circuit moments.Kanak Agarwal, Dennis Sylvester, David T. Blaauw
2003DACA cost-driven lithographic correction methodology based on off-the-shelf sizing tools.Puneet Gupta, Andrew B. Kahng, Dennis Sylvester, Jie Yang
2003DACAnalysis and minimization techniques for total leakage considering gate oxide leakage.Dongwoo Lee, Wesley Kwong, David T. Blaauw, Dennis Sylvester
2003DACPushing ASIC performance in a power envelope.Ruchir Puri, Leon Stok, John M. Cohn, David S. Kung, David Z. Pan, Dennis Sylvester, Ashish Srivastava, Sarvesh H. Kulkarni
2003DACReshaping EDA for power.Jan M. Rabaey, Dennis Sylvester, David T. Blaauw, Kerry Bernstein, Jerry Frenkil, Mark Horowitz, Wolfgang Nebel, Takayasu Sakurai, Andrew Yang
2003ICCADSwitch-Factor Based Loop RLC Modeling for Efficient Timing Analysis.Yu Cao, Xiaodong Yang, Xuejue Huang, Dennis Sylvester
2003ICCDOptimal Inductance for On-chip RLC Interconnections.Shidhartha Das, Kanak Agarwal, David T. Blaauw, Dennis Sylvester
2003ISLPEDStatistical estimation of leakage current considering inter- and intra-die process variation.Rajeev R. Rao, Ashish Srivastava, David T. Blaauw, Dennis Sylvester
2002ISLPEDModeling and analysis of leakage power considering within-die process variations.Ashish Srivastava, Robert Bai, David T. Blaauw, Dennis Sylvester
2002VLSIDEfficient Generation of Delay Change Curves for Noise-Aware Static Timing Analysis.Kanak Agarwal, Yu Cao, Takashi Sato, Dennis Sylvester, Chenming Hu
2001DACFuture Performance Challenges in Nanometer Design.Dennis Sylvester, Himanshu Kaul
2000DACGTX: the MARCO GSRC technology extrapolation system.Andrew E. Caldwell, Yu Cao, Andrew B. Kahng, Farinaz Koushanfar, Hua Lu, Igor L. Markov, Michael Oliver, Dirk Stroobandt, Dennis Sylvester
2000ICCADEffects of Global Interconnect Optimizations on Performance Estimation of Deep Submicron Design.Yu Cao, Chenming Hu, Xuejue Huang, Andrew B. Kahng, Sudhakar Muddu, Dirk Stroobandt, Dennis Sylvester
1998ICCADGetting to the bottom of deep submicron.Dennis Sylvester, Kurt Keutzer