Giulio Gambardella
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
19
Venues
9
Active years
2013–2026
Best venue rank
B
Where they publish
Papers
19 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | DATE | Multi-Partner Project: dAIEDGE - A Network of Excellence for Distributed, Trustworthy, Efficient and Scalable AI at the Edge. | Alain Pagani, Jos Cano, Haralampos-G. Stratigopoulos, Aysajan Abidin, Mhd Rashed Al Koutayni, Luca Benini, Angelos Bilas, Alessandro Capotondi, Roberto Cavicchioli, Brian Clerkin, Oscar Dniz-Surez, Margaux Divernois, Baptiste Dupertuis, Dorvan Favre, Giulio Gambardella, Ander Garca Gangoiti, Carlo Augusto Grazia, Dominik Gnzel, Jude Haris, Klodjan K. Hidri, Mack Huguenin, Manal Jammal, Paul Kling, Christos Kozanitis, Xavier Lessage, Srikanth Mandapati, Philippe Massonet, Alfio Di Mauro, Varesh Mishra, Juan Odriozola, Javier Parra-Domnguez, Nuria Pazos, Viviane Potocnik, Miguel de Prado, Rohit Prasad, Spyridon Raptis, Gregoire Rebstein, Ignacio Saudo Olmedo, Mohamed Selim, Chinmay Satish Shrivastav, Noelia Vllez, Giorgos Vasiliadis, Micaela Verrucchi, Enrico Vincenzi, Damian Vizr, Devendra Vyas, Stefan Wiehle |
| 2026 | ETS | Towards Resilient Transformer-Encoders: Fault Injection and Hardware Agnostic Error Mitigation. | Vishal Thomas, Ussama Zahid, Giulio Gambardella, Sumeet Sapkal, Haralampos-G. Stratigopoulos, Brian Clerkin |
| 2025 | ETS | On the Fault Sensitivity of Natural Language Embeddings Computation. | Sumeet Sapkal, Ussama Zahid, Giulio Gambardella, Haralampos-G. Stratigopoulos, Brian Clerkin |
| 2020 | FPGA | Evaluation of Optimized CNNs on FPGA and non-FPGA based Accelerators using a Novel Benchmarking Approach. | Michaela Blott, Johannes Kath, Lisa Halder, Yaman Umuroglu, Nicholas J. Fraser, Giulio Gambardella, Miriam Leeser, Linda Doyle |
| 2020 | ITC | FAT: Training Neural Networks for Reliable Inference Under Hardware Faults. | Ussama Zahid, Giulio Gambardella, Nicholas J. Fraser, Michaela Blott, Kees A. Vissers |
| 2019 | FPGA | Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs. | Yifan Yang, Qijing Huang, Bichen Wu, Tianjun Zhang, Liang Ma, Giulio Gambardella, Michaela Blott, Luciano Lavagno, Kees A. Vissers, John Wawrzynek, Kurt Keutzer |
| 2018 | DATE | Inference of quantized neural networks on heterogeneous all-programmable devices. | Thomas B. Preuer, Giulio Gambardella, Nicholas J. Fraser, Michaela Blott |
| 2018 | FPL | Customizing Low-Precision Deep Neural Networks for FPGAs. | Julian Faraone, Giulio Gambardella, Nicholas J. Fraser, Michaela Blott, Philip H. W. Leong, David Boland |
| 2018 | FPL | FINN-L: Library Extensions and Design Trade-Off Analysis for Variable Precision LSTM Networks on FPGAs. | Vladimir Rybalkin, Alessandro Pappalardo, Muhammad Mohsin Ghaffar, Giulio Gambardella, Norbert Wehn, Michaela Blott |
| 2017 | FPGA | FINN: A Framework for Fast, Scalable Binarized Neural Network Inference. | Yaman Umuroglu, Nicholas J. Fraser, Giulio Gambardella, Michaela Blott, Philip Heng Wai Leong, Magnus Jahre, Kees A. Vissers |
| 2017 | ICCD | Scaling Neural Network Performance through Customized Hardware Architectures on Reconfigurable Logic. | Michaela Blott, Thomas B. Preuer, Nicholas J. Fraser, Giulio Gambardella, Kenneth O'Brien, Yaman Umuroglu, Miriam Leeser |
| 2017 | ICONIP | Compressing Low Precision Deep Neural Networks Using Sparsity-Induced Regularization in Ternary Networks. | Julian Faraone, Nicholas J. Fraser, Giulio Gambardella, Michaela Blott, Philip Heng Wai Leong |
| 2014 | DSD | On Enhancing Fault Injection's Capabilities and Performances for Safety Critical Systems. | Stefano Di Carlo, Giulio Gambardella, Paolo Prinetto, Frank Reichenbach, Trond Lkstad, Gulzaib Rafiq |
| 2014 | IOLTS | A novel methodology to increase fault tolerance in autonomous FPGA-based systems. | Stefano Di Carlo, Giulio Gambardella, Paolo Prinetto, Daniele Rolfo, Pascal Trotta, Alessandro Vallero |
| 2013 | ETS | A software-based self test of CUDA Fermi GPUs. | Stefano Di Carlo, Giulio Gambardella, Marco Indaco, Ippazio Martella, Paolo Prinetto, Daniele Rolfo, Pascal Trotta |
| 2013 | FPL | Dependable Dynamic Partial Reconfiguration with minimal area & time overheads on Xilinx FPGAS. | Stefano Di Carlo, Giulio Gambardella, Marco Indaco, Paolo Prinetto, Daniele Rolfo, Pascal Trotta |
| 2013 | FPL | FEMIP: A high performance FPGA-based features extractor & matcher for space applications. | Stefano Di Carlo, Giulio Gambardella, Paolo Prinetto, Daniele Rolfo, Pascal Trotta, Piergiorgio Lanza |
| 2013 | IOLTS | Increasing the robustness of CUDA Fermi GPU-based systems. | Stefano Di Carlo, Giulio Gambardella, Marco Indaco, Ippazio Martella, Paolo Prinetto, Daniele Rolfo, Pascal Trotta |
| 2013 | ITC | Fault mitigation strategies for CUDA GPUs. | Stefano Di Carlo, Giulio Gambardella, Ippazio Martella, Paolo Prinetto, Daniele Rolfo, Pascal Trotta |