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Heinrich Meyr

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

99

Venues

23

Active years

1982–2020

Best venue rank

A*

Where they publish

Papers

99 indexed papers, newest first.

YearVenueTitleAuthors
2020ICRAObservability Analysis of Flight State Estimation for UAVs and Experimental Validation.Peng Huang, Heinrich Meyr, Meik Drpinghaus, Gerhard P. Fettweis
2017ISITAn information theoretic analysis of sequential decision-making.Meik Dorpinghaus, dgar Roldn, Izaak Neri, Heinrich Meyr, Frank Jlicher
2015PIMRCChannel-aware local search (CA-LS) for iterative MIMO detection.I-Wei Lai, Chia-Han Lee, Gerd Ascheid, Heinrich Meyr, Tzi-Dar Chiueh
2012GLOBECOMSearching for optimal scheduling of MIMO doubly iterative receivers: An ant colony optimization-based method.Dan Zhang, Gaojian Wang, Gerd Ascheid, Heinrich Meyr
2010CISSIterative channel estimation control for MIMO-OFDM Systems.Dan Zhang, Konstantinos Nikitopoulos, I-Wei Lai, Gerd Ascheid, Heinrich Meyr
2010DATETrace-based KPN composability analysis for mapping simultaneous applications to MPSoC platforms.Jernimo Castrilln, Ricardo Velasquez, Anastasia Stulova, Weihua Sheng, Jianjiang Ceng, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
2010ISITAThe achievable rate of stationary rayleigh flat-fading channels with IID input symbols.Meik Dorpinghaus, Heinrich Meyr, Gerd Ascheid
2010ISITABER analysis for MIMO BICM-ID assuming finite precision of extrinsic LLR.Chien-Yi Wang, I-Wei Lai, Tzi-Dar Chiueh, Gerd Ascheid, Heinrich Meyr
2009GLOBECOMSearching in the Delta Lattice: An Efficient MIMO Detection for Iterative Receivers.I-Wei Lai, Chun-Hao Liao, Ernst Martin Witte, David Kammler, Filippo Borlenghi, Konstantinos Nikitopoulos, Venkatesh Ramakrishnan, Dan Zhang, Tzi-Dar Chiueh, Gerd Ascheid, Heinrich Meyr
2009PIMRCCombining orthogonalized partial metrics: Efficient enumeration for soft-input sphere decoder.Chun-Hao Liao, I-Wei Lai, Konstantinos Nikitopoulos, Filippo Borlenghi, David Kammler, Ernst Martin Witte, Dan Zhang, Tzi-Dar Chiueh, Gerd Ascheid, Heinrich Meyr
2009PIMRCEfficient implementations from libraries: Analyzing the influence of configuration parameters on key performance properties.Venkatesh Ramakrishnan, Joschka zur Jacobsmuehlen, I-Wei Lai, Torsten Kempf, Marc Adrat, Gerd Ascheid, Markus Antweiler, Heinrich Meyr
2009VTCLow-Complexity Channel-Adaptive MIMO Detection with Just-Acceptable Error Rate.I-Wei Lai, Gerd Ascheid, Heinrich Meyr, Tzi-Dar Chiueh
2009VLSIDA Workbench for Analytical and Simulation Based Design Space Exploration of Software Defined Radios.Torsten Kempf, Stefan Wallentowitz, Gerd Ascheid, Rainer Leupers, Heinrich Meyr
2008DACMAPS: an integrated framework for MPSoC application parallelization.Jianjiang Ceng, Jernimo Castrilln, Weihua Sheng, Hanno Scharwchter, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Tsuyoshi Isshiki, Hiroaki Kunieda
2008DACMultiprocessor performance estimation using hybrid simulation.Lei Gao, Kingshuk Karuri, Stefan Kraemer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
2008DATEHigh-level Modelling and Exploration of Coarse-grained Re-configurable Architectures.Anupam Chattopadhyay, Xiaolin Chen, Harold Ishebabi, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
2008DATERetargetable Code Optimization for Predicated Execution.Manuel Hohenauer, Felix Engel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gerrit Bette, Balpreet Singh
2008ISITOptimal PSK signaling over stationary Rayleigh fading channels.Meik Drpinghaus, Gerd Ascheid, Heinrich Meyr, Rudolf Mathar
2008VTCLong-Term Beamforming in Single Frequency Networks using Semidefinite Relaxation.Markus Jordan, Martin Senst, Gerd Ascheid, Heinrich Meyr
2007CASESA fast and generic hybrid simulation approach using C virtual machine.Lei Gao, Stefan Kraemer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
2007DATEDesign space exploration of partially re-configurable embedded processors.Anupam Chattopadhyay, W. Ahmed, Kingshuk Karuri, David Kammler, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
2007DATEInteractive presentation: SoftSIMD - exploiting subword parallelism using source code transformations.Stefan Kraemer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
2007GLOBECOMJoint Reduction of Peak-to-Average Power Ratio and Out-of-Band Power in OFDM Systems.Martin Senst, Markus Jordan, Meik Dorpinghaus, Michael Farber, Gerd Ascheid, Heinrich Meyr
2007ICCADIncreasing data-bandwidth to instruction-set extensions through register clustering.Kingshuk Karuri, Anupam Chattopadhyay, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
2007VTCOn the Influence of Pilot Symbol and Data Symbol Positioning on Turbo Synchronization.Susanne Godtmann, Andr Pollok, Niels Hadaschik, Gerd Ascheid, Heinrich Meyr
2007VTCPerformance Evaluation of Opportunistic Beamforming with SINR Prediction for HSDPA.Markus Jordan, Gerd Ascheid, Heinrich Meyr
2007WCNCPrediction of Downlink SNR for Opportunistic Beamforming.Markus Jordan, Lars Schmitt, Gerd Ascheid, Heinrich Meyr
2007RSPPre- and Post-Fabrication Architecture Exploration for Partially Reconfigurable VLIW Processors.Anupam Chattopadhyay, Zoltan Endre Rakosi, Kingshuk Karuri, David Kammler, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
2006DATEAutomatic ADL-based operand isolation for embedded processors.Anupam Chattopadhyay, Benedikt Geukes, David Kammler, Ernst Martin Witte, Oliver Schliebusch, Harold Ishebabi, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
2006DATEASIP design and synthesis for non linear filtering in image processing.Luca Fanucci, Michele Cassiano, Sergio Saponara, David Kammler, Ernst Martin Witte, Oliver Schliebusch, Gerd Ascheid, Rainer Leupers, Heinrich Meyr
2006DATEDesign and implementation of a modular and portable IEEE 754 compliant floating-point unit.Kingshuk Karuri, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Monu Kedia
2006DATEA SW performance estimation framework for early system-level-design using fine-grained instrumentation.Torsten Kempf, Kingshuk Karuri, Stefan Wallentowitz, Gerd Ascheid, Rainer Leupers, Heinrich Meyr
2006DATEAn interprocedural code optimization technique for network processors using hardware multi-threading support.Hanno Scharwchter, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
2006ICASSPDesign of Application Specific Processors for the Cached FFT Algorithm.Oguzhan Atak, Abdullah Atalar, Erdal Arikan, Harold Ishebabi, David Kammler, Gerd Ascheid, Heinrich Meyr, Mario Nicola, Guido Masera
2006ISCASAn efficient parallelization technique for high throughput FFT-ASIPs.Harold Ishebabi, Gerd Ascheid, Heinrich Meyr, Oguzhan Atak, Abdullah Atalar, Erdal Arikan
2006ISLPEDFlexibility and low power: a contradiction in terms?Peter Wintermayr, Reiner W. Hartenstein, Heinrich Meyr, Steve Leibson
2006PIMRCAchievable Data Rate of Wideband OFDM With Data-Aided Channel Estimation.Niels Hadaschik, Gerd Ascheid, Heinrich Meyr
2006RSPIntegrated Verification Approach during ADL-Driven Processor Design.Anupam Chattopadhyay, Arnab Sinha, Diandian Zhang, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
2005ASPDACA framework for automated and optimized ASIP implementation supporting multiple hardware description languages.Oliver Schliebusch, Anupam Chattopadhyay, David Kammler, Gerd Ascheid, Rainer Leupers, Heinrich Meyr, Tim Kogel
2005DACFine-grained application source code profiling for ASIP design.Kingshuk Karuri, Mohammad Abdullah Al Faruque, Stefan Kraemer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
2005DATEC Compiler Retargeting Based on Instruction Semantics Models.Jianjiang Ceng, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun
2005DATEA Modular Simulation Framework for Spatial and Temporal Task Mapping onto Multi-Processor SoC Platforms.Torsten Kempf, Malte Doerper, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Tim Kogel, Bart Vanthournout
2005ICASSPImproving MIMO phase noise estimation by exploiting spatial correlations.Niels Hadaschik, Meik Drpinghaus, Andreas Senst, Ole Harmjanz, Uwe Kufer, Gerd Ascheid, Heinrich Meyr
2005RSPOptimization Techniques for ADL-Driven RTL Processor Synthesis.Oliver Schliebusch, Anupam Chattopadhyay, Ernst Martin Witte, David Kammler, Gerd Ascheid, Rainer Leupers, Heinrich Meyr
2004DACA novel approach for flexible and consistent ADL-driven ASIP design.Gunnar Braun, Achim Nohl, Weihua Sheng, Jianjiang Ceng, Manuel Hohenauer, Hanno Scharwchter, Rainer Leupers, Heinrich Meyr
2004DACHeterogeneous MP-SoC: the solution to energy-efficient signal processing.Tim Kogel, Heinrich Meyr
2004DATEA Methodology and Tool Suite for C Compiler Generation from ADL Processor Models.Manuel Hohenauer, Hanno Scharwchter, Kingshuk Karuri, Oliver Wahlen, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun, Hans van Someren
2004DATERTL Processor Synthesis for Architecture Exploration and Implementation.Oliver Schliebusch, Anupam Chattopadhyay, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Mario Steinert, Gunnar Braun, Achim Nohl
2004DATEA System Level Processor/Communication Co-Exploration Methodology for Multi-Processor System-on-Chip Platform.Andreas Wieferink, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun, Achim Nohl
2004VTCStochastic modeling of the convergence behavior of concatenated codes.Rudolf Mathar, Heinrich Meyr
2004SCOPESASIP Architecture Exploration for Efficient Ipsec Encryption: A Case Study.Hanno Scharwchter, David Kammler, Andreas Wieferink, Manuel Hohenauer, Kingshuk Karuri, Jianjiang Ceng, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
2003DACInstruction encoding synthesis for architecture exploration using hierarchical processor models.Achim Nohl, Volker Greive, Gunnar Braun, Andreas Hoffmann, Rainer Leupers, Oliver Schliebusch, Heinrich Meyr
2003DATEProcessor/Memory Co-Exploration on Multiple Abstraction Levels.Gunnar Braun, Andreas Wieferink, Oliver Schliebusch, Rainer Leupers, Heinrich Meyr, Achim Nohl
2003GLOBECOMInitial synchronization of W-CDMA systems using a power-scaled detector with antenna diversity in frequency-selective Rayleigh fading channels.Lars Schmitt, Volker Simon, Thomas Grundler, Christoph Schreyoegg, Heinrich Meyr
2003GLOBECOMThe effect of imperfect SNR knowledge on multiantenna multiuser systems with channel aware scheduling.Peter Schulz-Rittich, Andreas Senst, Thomas Bilke, Heinrich Meyr
2003GLOBECOMSynchronization requirements for COFDM systems with transmit diversity.Michael Speth, Heinrich Meyr
2003SCOPESExtraction of Efficient Instruction Schedulers from Cycle-True Processor Models.Oliver Wahlen, Manuel Hohenauer, Gunnar Braun, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Xiaoning Nie
2002DACA universal technique for fast and flexible instruction-set architecture simulation.Achim Nohl, Gunnar Braun, Oliver Schliebusch, Rainer Leupers, Heinrich Meyr, Andreas Hoffmann
2002ISLPEDDesigning SoC's.Tobias Noll, Heinrich Meyr
2002VLSIDArchitecture Implementation Using the Machine Description Language LISA.Oliver Schliebusch, Andreas Hoffmann, Achim Nohl, Gunnar Braun, Heinrich Meyr
2001DACFast Bit-True Simulation.Holger Keding, Martin Coors, Olaf Lthje, Heinrich Meyr
2001DATEA framework for fast hardware-software co-simulation.Andreas Hoffmann, Tim Kogel, Heinrich Meyr
2001DATEGenerating production quality software development tools using a machine description language.Andreas Hoffmann, Achim Nohl, Stefan Pees, Gunnar Braun, Heinrich Meyr
2001DATEThe programmable platform: does one size fit all?A. Lock, Raul Camposano, Heinrich Meyr
2001ICASSPInteger code generation for the TI TMS320C62X.Martin Coors, Holger Keding, Olaf Lthje, Heinrich Meyr
2001ICASSPA survey on modeling issues using the machine description language LISA.Andreas Hoffmann, Achim Nohl, Gunnar Braun, Heinrich Meyr
2001ICCADA Methodology for the Design of Application Specific Instruction Set Processors (ASIP) using the Machine Description Language LISA.Andreas Hoffmann, Oliver Schliebusch, Achim Nohl, Gunnar Braun, Oliver Wahlen, Heinrich Meyr
2001ITWAchievable rate of MIMO channels with data-aided channel estimation.Jens Baltersee, Gunnar Fock, Heinrich Meyr
2000DACEfficient building block based RTL code generation from synchronous data flow graphs.Jens Horstmannshoff, Heinrich Meyr
2000DATERetargeting of Compiled Simulators for Digital Signal Processors Using a Machine Description Language.Stefan Pees, Andreas Hoffmann, Heinrich Meyr
2000ICASSPDSP core verification using automatic test case generation.Tilman Glkler, Stefan Bitterlich, Heinrich Meyr
1999DACLISA - Machine Description Language for Cycle-Accurate Models of Programmable DSP Architectures.Stefan Pees, Andreas Hoffmann, Vojin Zivojnovic, Heinrich Meyr
1998DATEFRIDGE: A Fixed-Point Design and Simulation Environment.Holger Keding, Markus Willems, Martin Coors, Heinrich Meyr
1997DACSystem Level Fixed-Point Design Based on an Interpolative Approach.Markus Willems, Volker Brsgens, Holger Keding, Thorsten Grtker, Heinrich Meyr
1997DATEPCC: a modeling technique for mixed control/data flow systems.Thorsten Grtker, Rainer Schoenen, Heinrich Meyr
1997ICASSPUnified specification of control and data flow.Thorsten Grtker, Rainer Schoenen, Heinrich Meyr
1997ICASSPAn upper bound of the throughput of multirate multiprocessor schedules.Rainer Schoenen, Vojin Zivojnovic, Heinrich Meyr
1997ICASSPFRIDGE: an interactive code generation environment for HW/SW codesign.Markus Willems, Volker Brsgens, Thorsten Grtker, Heinrich Meyr
1997ICASSPModulo-addressing utilization in automatic software synthesis for digital signal processors.Markus Willems, Holger Keding, Vojin Zivojnovic, Heinrich Meyr
1996DACCompiled HW/SW Co-Simulation.Vojin Zivojnovic, Heinrich Meyr
1995DACDigital Receiver Design Using VHDL Generation from Data Flow Graphs.Peter Zepter, Thorsten Grtker, Heinrich Meyr
1995ICASSPADEN: an environment for digital receiver ASIC design.Thorsten Grtker, Peter Zepter, Heinrich Meyr
1995ICASSPDSP-based mobile and satellite receivers, from algorithm to implementation: a design course at Aachen University of Technology.Oliver Mauss, Matthias Pankert, Ferdinand Classen, Heinrich Meyr
1995ICASSPScheduling for optimum data memory compaction in block diagram oriented software synthesis.Sebastian Ritz, Markus Willems, Heinrich Meyr
1995ITCTest Point Insertion for an Area Efficient BIST.Claus Schotten, Heinrich Meyr
1995PIMRCReal-time algorithms and VLSI architectures for soft output MAP convolutional decoding.Herbert Dawid, Heinrich Meyr
1995PIMRCViterbi decoding with dual timescale traceback processing.Olaf J. Joeressen, Heinrich Meyr
1994ICASSPDynamic data flow and control flow in high level DSP code synthesis.Matthias Pankert, Oliver Mauss, Sebastian Ritz, Heinrich Meyr
1994ICASSPRetiming of DSP programs for optimum vectorization.Vojin Zivojnovic, Sebastian Ritz, Heinrich Meyr
1994ISCASIs it Possible to achieve a Teraflop/s on a chip? From High Performance Algorithms to Architectures.Francky Catthoor, Ed F. Deprettere, Yu Hen Hu, Jan M. Rabaey, Heinrich Meyr, Lothar Thiele
1994ISCASHigh Speed FIR-Filter Architectures with Scalable Sample Rates.Martin Vaupel, Heinrich Meyr
1994PIMRCImproved frame synchronization for spontaneous packet transmission over frequency-selective radio channels.Stefan A. Fechtel, Heinrich Meyr
1994VTCFrequency synchronization algorithms for OFDM systems suitable for communication over frequency selective fading channels.Ferdinand Classen, Heinrich Meyr
1994VTCA digital feedforward differential detection MSK receiver for packet-based mobile radio.Uwe Lambrette, Heinrich Meyr
1993ICCDPartitioning and Surmounting the Software-Hardware Abstraction Gap in an ASIC Design Project.Klaus ten Hagen, Heinrich Meyr
1993ISCASDesign of optimum interpolation filters for digital demodulators.Vojin Zivojnovic, Heinrich Meyr
1992PIMRCA new mobile digital radio transceiver concept using low-complexity combined equalization/trellis decoding and a near-optimal receiver sync strategy.Stefan A. Fechtel, Heinrich Meyr
1988LCNError handling performance of a token ring LAN.Jrgen Tusch, Heinrich Meyr, Erwin A. Zurfluh
1982ICASSPReal-time estimation of moving time delay.Heinrich Meyr, Gerhard Spies, Jrg Bohmann