| 2020 | DATE | RESCUE: Interdependent Challenges of Reliability, Security and Quality in Nanoelectronic Systems. | Maksim Jenihhin, Said Hamdioui, Matteo Sonza Reorda, Milos Krstic, Peter Langendrfer, Christian Sauer, Anton Klotz, Michael Hbner, Jrg Nolte, Heinrich Theodor Vierhaus, Georgios N. Selimis, Dan Alexandrescu, Mottaqiallah Taouil, Geert Jan Schrijen, Jaan Raik, Luca Sterpone, Giovanni Squillero, Zoya Dyka |
| 2018 | DSD | Optimal Dependability and Fine Granular Error Resilience Methodology for Reconfigurable Systems. | Farnoosh Hosseinzadeh, Petr Pfeifer, Heinrich Theodor Vierhaus |
| 2017 | DDECS | Fault detection and self repair in Hsiao-code FEC circuits. | Davide Dicorato, Petr Pfeifer, Heinrich Theodor Vierhaus |
| 2017 | IOLTS | On comparison of robust configurable FPGA encoders for dependable industrial communication systems. | Petr Pfeifer, Farnoosh Hosseinzadeh, Heinrich Theodor Vierhaus |
| 2017 | IOLTS | Fast power overhead prediction for hardware redundancy-based fault tolerance. | Stefan Scharoba, Heinrich Theodor Vierhaus |
| 2016 | DDECS | Test of automotive embedded processors with high diagnostic resolution. | Christian Gleichner, Heinrich Theodor Vierhaus |
| 2016 | DSD | An Interactive Design Space Exploration Tool for Dependable Integrated Circuits. | Stefan Scharoba, Heinrich Theodor Vierhaus |
| 2015 | DDECS | Combining Correction of Delay Faults and Transient Faults. | Tobias Koal, Stefan Scharoba, Heinrich Theodor Vierhaus |
| 2015 | DDECS | Compiler-Centred Microprocessor Design (CoMet) - From C-Code to a VHDL Model of an ASIP. | Roberto Urban, Mario Schlzel, Heinrich Theodor Vierhaus, Enrico Altmann, Horst Seelig |
| 2015 | GI | Detection and Correction of Logic Errors Using Extra Time Slots. | Davide Dicorato, Heinrich Theodor Vierhaus |
| 2015 | GI | Test eingebetteter Prozessoren im Zielsystem mit hoher diagnostischer Auflsung. | Christian Gleichner, Heinrich Theodor Vierhaus |
| 2015 | GI | Doktorandenprogramm der INFORMATIK 2015. | Ansgar Scherp, Steffen Becker, Heinrich Theodor Vierhaus |
| 2015 | GI | Fehlertolerante und energieeffiziente eingebettete Systeme: Methoden und Anwendungen. | Mario Schlzel, Heinrich Theodor Vierhaus |
| 2014 | DDECS | Combining fault tolerance and self repair at minimum cost in power and hardware. | Tobias Koal, Mario Schlzel, Heinrich Theodor Vierhaus |
| 2014 | ETS | Reconfigurable high performance architectures: How much are they ready for safety-critical applications? | Davide Sabena, Luca Sterpone, Mario Schlzel, Tobias Koal, Heinrich Theodor Vierhaus, S. Wong, Robrt Glein, Florian Rittner, C. Stender, Mario Porrmann, Jens Hagemeyer |
| 2014 | ETS | Systematic generation of diagnostic software-based self-test routines for processor components. | Mario Schlzel, Tobias Koal, Heinrich Theodor Vierhaus |
| 2014 | IOLTS | Timing for virtual TMR in logic circuits. | Sebastian Mller, Tobias Koal, Mario Schlzel, Heinrich Theodor Vierhaus |
| 2013 | DDECS | On the feasibility of combining on-line-test and self repair for logic circuits. | Tobias Koal, Markus Ulbricht, Piet Engelke, Heinrich Theodor Vierhaus |
| 2013 | DDECS | On performance estimation of a scalable VLIW soft-core in XILINX FPGAs. | Petr Pfeifer, Zdenek Plva, Mario Schlzel, Tobias Koal, Heinrich Theodor Vierhaus |
| 2013 | DSD | Virtual TMR Schemes Combining Fault Tolerance and Self Repair. | Tobias Koal, Markus Ulbricht, Heinrich Theodor Vierhaus |
| 2013 | PDP | Towards a Graceful Degradable Multicore-System by Hierarchical Handling of Hard Errors. | Sebastian Mller, Mario Schlzel, Heinrich Theodor Vierhaus |
| 2012 | DDECS | Combining on-line fault detection and logic self repair. | Tobias Koal, Markus Ulbricht, Heinrich Theodor Vierhaus |
| 2012 | DDECS | An adaptive self-test routine for in-field diagnosis of permanent faults in simple RISC cores. | Mario Schlzel, Tobias Koal, Heinrich Theodor Vierhaus |
| 2012 | DSD | Scan Based Tests via Standard Interfaces. | Christian Gleichner, Heinrich Theodor Vierhaus, Piet Engelke |
| 2012 | DSD | Activity Migration in M-of-N-Systems by Means of Load-Balancing. | Markus Ulbricht, Heinrich Theodor Vierhaus, Tobias Koal |
| 2011 | DDECS | Optimal spare utilization for reliability and mean lifetime improvement of logic built-in self-repair. | Tobias Koal, Heinrich Theodor Vierhaus |
| 2011 | DDECS | A new hierarchical built-in self-test with on-chip diagnosis for VLIW processors. | Markus Ulbricht, Mario Schlzel, Tobias Koal, Heinrich Theodor Vierhaus |
| 2010 | DDECS | A software-based self-test and hardware reconfiguration solution for VLIW processors. | Tobias Koal, Heinrich Theodor Vierhaus |
| 2010 | DDECS | Combining de-stressing and self repair for long-term dependable systems. | Tobias Koal, Heinrich Theodor Vierhaus |
| 2010 | DSD | Test Data and Power Reductions for Transition Delay Tests for Massive-Parallel Scan Structures. | Ren Kothe, Heinrich Theodor Vierhaus |
| 2009 | DDECS | A scheme of logic self repair including local interconnects. | Tobias Koal, Daniel Scheit, Heinrich Theodor Vierhaus |
| 2009 | DSD | Reliability Estimation Process. | Tobias Koal, Daniel Scheit, Heinrich Theodor Vierhaus |
| 2009 | DSD | A Concept for Logic Self Repair. | Tobias Koal, Heinrich Theodor Vierhaus, Daniel Scheit |
| 2008 | DSD | Embedded Diagnostic Logic Test Exploiting Regularity. | Heinrich Theodor Vierhaus, Ren Kothe |
| 2008 | IOLTS | Basic Architecture for Logic Self Repair. | Tobias Koal, Heinrich Theodor Vierhaus |
| 2007 | DDECS | Flip-Flops and Scan-Path Elements for Nanoelectronics. | Ren Kothe, Heinrich Theodor Vierhaus |
| 2007 | DSD | Fault Injection Techniques and their Accelerated Simulation in SystemC. | Silvio Misera, Heinrich Theodor Vierhaus, Andr Sieber |
| 2007 | DSD | Timing- / Power-Optimization for Digital Logic Based on Standard Cells. | Heinrich Theodor Vierhaus, Helmut Rossmann, Silvio Misera |
| 2007 | IOLTS | A Configurable Modular Test Processor and Scan Controller Architecture. | R. Frost, D. Rudolph, Christian Galke, Ren Kothe, Heinrich Theodor Vierhaus |
| 2006 | DATE | Evaluating coverage of error detection logic for soft errors using formal methods. | Udo Krautz, Matthias Pflanz, Christian Jacobi, Hans-Werner Tast, Kai Weber, Heinrich Theodor Vierhaus |
| 2006 | DDECS | Hardware/Software Based Hierarchical Self Test for SoCs. | Ren Kothe, Christian Galke, Sabine Schultke, Henry Frschke, Steffen Gaede, Heinrich Theodor Vierhaus |
| 2006 | DDECS | Embedded Self Repair by Transistor and Gate Level Reconfiguration. | Ren Kothe, Heinrich Theodor Vierhaus, Torsten Coym, Wolfgang Vermeiren, Bernd Straube |
| 2006 | DSD | Scan-Based SoC Test Using Space / Time Pattern Compaction Schemes. | Christian Galke, U. Gtzschmann, Heinrich Theodor Vierhaus |
| 2006 | DSD | A Mixed Language Fault Simulation of VHDL and SystemC. | Silvio Misera, Heinrich Theodor Vierhaus, Lars Breitenfeld, Andr Sieber |
| 2006 | IOLTS | Embedded Scan Test with Diagnostic Features for Self-Testing SoCs. | Christian Galke, Ren Kothe, Sabine Schultke, K. Winkler, Jeanette Honko, Heinrich Theodor Vierhaus |
| 2006 | IOLTS | Built-in Self Repair by Reconfiguration of FPGAs. | S. Habermann, Ren Kothe, Heinrich Theodor Vierhaus |
| 2005 | GI | Power-/Timing - Optimierung fr Zellen-basierte Digitalschaltungen in Submikron-Technologien. | Heinrich Theodor Vierhaus, Helmut Rossmann |
| 2005 | IOLTS | A Multi-Purpose Concept for SoC Self Test Including Diagnostic Features. | Ren Kothe, Christian Galke, Heinrich Theodor Vierhaus |
| 2004 | IOLTS | A Hierarchical Self Test Scheme for SoCs. | Claudia Kretzschmar, Christian Galke, Heinrich Theodor Vierhaus |
| 2003 | IOLTS | Perspectives of Combining on-line and off-line Test Technology for Dependable Systems on a Chip. | Christian Galke, Marcus Grabow, Heinrich Theodor Vierhaus |
| 2003 | IOLTS | Control Signal Protection For High Performance Processors. | Matthias Pflanz, Heinrich Theodor Vierhaus |
| 2002 | ICCD | A Test Processor Concept for Systems-on-a-Chip. | Christian Galke, Matthias Pflanz, Heinrich Theodor Vierhaus |
| 2002 | IOLTS | On-line Detection and Compensation of Transient Errors in Processor Pipeline-Structures. | Christian Galke, Matthias Pflanz, Heinrich Theodor Vierhaus |
| 2002 | IOLTS | On-Line Error Detection and Correction in Storage Elements with Cross-Parity Check. | Matthias Pflanz, Karsten Walther, Christian Galke, Heinrich Theodor Vierhaus |
| 2001 | DATE | A register-transfer-level fault simulator for permanent and transient faults in embedded processors. | C. Rousselle, Matthias Pflanz, A. Behling, T. Mohaupt, Heinrich Theodor Vierhaus |
| 2001 | IOLTS | On-line Error Detection Techniques for Dependable Embedded Processors with High Complexity. | Matthias Pflanz, Karsten Walther, Heinrich Theodor Vierhaus |
| 1999 | ITC | An efficient on-line-test and back-up scheme for embedded processors. | Matthias Pflanz, Heinrich Theodor Vierhaus, F. Pompsch |
| 1995 | DATE | Gate delay fault test generation for non-scan circuits. | G. Van Brakel, Uwe Glser, Hans G. Kerkhoff, Heinrich Theodor Vierhaus |
| 1995 | VTS | Improving topological ATPG with symbolic techniques. | Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda, Uwe Glser, Heinrich Theodor Vierhaus |
| 1994 | ICCAD | Test generation for bridging faults in CMOS ICs based on current monitoring versus signal propagation. | Uwe Glser, Heinrich Theodor Vierhaus, M. Kley, A. Wiederhold |
| 1994 | ICCD | Testability Analysis for Test Generation in Synchronous Sequential Circuits. | R. Wolber, Uwe Glser, Heinrich Theodor Vierhaus |
| 1993 | ITC | CMOS Bridges and Resistive Transistor Faults: I | Heinrich Theodor Vierhaus, Wolfgang Meyer, Uwe Glser |
| 1992 | ICCAD | Efficient partitioning and analysis of digital CMOS-circuits. | Uwe Hbner, Heinrich Theodor Vierhaus |
| 1992 | ICCD | Library Mapping of CMOS-Switch-Level-Circuits by Extraction of Isomorphic Subgraphs. | Ursula Westerholz, Heinrich Theodor Vierhaus |
| 1992 | ITC | Mixed Level Hierarchical Test Generation for Transition Faults and Overcurrent Related Defects. | Uwe Glser, Uwe Hbner, Heinrich Theodor Vierhaus |