| 2018 | DAC | CASTLE: compression architecture for secure low latency, low energy, high endurance NVMs. | Poovaiah M. Palangappa, Kartik Mohanram |
| 2018 | DAC | ACME: advanced counter mode encryption for secure non-volatile memories. | Shivam Swami, Kartik Mohanram |
| 2018 | DAC | STASH: security architecture for smart hybrid memories. | Shivam Swami, Joydeep Rakshit, Kartik Mohanram |
| 2018 | DATE | ADAM: Architecture for write disturbance mitigation in scaled phase change memory. | Shivam Swami, Kartik Mohanram |
| 2018 | ICCAD | RAPID: read acceleration for improved performance and endurance in MLC/TLC NVMs. | Poovaiah M. Palangappa, Kartik Mohanram |
| 2018 | ICCD | ReadPRO: Read Prioritization Scheduling in ORAM for Efficient Obfuscation in Main Memories. | Joydeep Rakshit, Kartik Mohanram |
| 2017 | DAC | ASSURE: Authentication Scheme for SecURE Energy Efficient Non-Volatile Memories. | Joydeep Rakshit, Kartik Mohanram |
| 2017 | DATE | COVERT: Counter OVErflow ReducTion for efficient encryption of non-volatlle memories. | Shivam Swami, Kartik Mohanram |
| 2017 | VLSID | Virtual Two-Port Memory Architecture for Asymmetric Memory Technologies. | Jiayin Li, Kartik Mohanram |
| 2016 | DAC | SECRET: smartly EnCRypted energy efficient non-volatile memories. | Shivam Swami, Joydeep Rakshit, Kartik Mohanram |
| 2016 | HPCA | CompEx: Compression-expansion coding for energy, latency, and lifetime improvements in MLC/TLC NVM. | Poovaiah M. Palangappa, Kartik Mohanram |
| 2016 | VLSID | E3R: Energy Efficient Error Recovery for Multi/Triple-Level Cell Non-volatile Memories. | Shivam Swami, Kartik Mohanram |
| 2015 | DAC | Monolayer transition metal dichalcogenide and black phosphorus transistors for low power robust SRAM design. | Joydeep Rakshit, Runlai Wan, Kai Tak Lam, Jing Guo, Kartik Mohanram |
| 2014 | DATE | Write-once-memory-code phase change memory. | Jiayin Li, Kartik Mohanram |
| 2013 | DATE | Mempack: an order of magnitude reduction in the cost, risk, and time for memory compiler certification. | Kartik Mohanram, Matthew Wartell, Sundar Iyer |
| 2012 | DATE | High performance reliable variable latency carry select addition. | Kai Du, Peter J. Varman, Kartik Mohanram |
| 2011 | DAC | Universal logic modules based on double-gate carbon nanotube transistors. | Andrew Zukoski, Xuebei Yang, Kartik Mohanram |
| 2011 | DATE | Robust 6T Si tunneling transistor SRAM design. | Xuebei Yang, Kartik Mohanram |
| 2011 | DATE | Reliability-driven don't care assignment for logic synthesis. | Andrew Zukoski, Mihir R. Choudhury, Kartik Mohanram |
| 2011 | ICCAD | Unequal-error-protection codes in SRAMs for mobile multimedia applications. | Xuebei Yang, Kartik Mohanram |
| 2011 | ICCD | Static window addition: A new paradigm for the design of variable latency adders. | Kai Du, Peter J. Varman, Kartik Mohanram |
| 2010 | ASPDAC | Novel dual- | Masoud Rostami, Kartik Mohanram |
| 2010 | DATE | Analytical model for TDDB-based performance degradation in combinational logic. | Mihir R. Choudhury, Vikas Chandra, Kartik Mohanram, Robert C. Aitken |
| 2010 | DATE | TIMBER: Time borrowing and error relaying for online timing error resilience. | Mihir R. Choudhury, Vikas Chandra, Kartik Mohanram, Robert C. Aitken |
| 2010 | DATE | Power consumption of logic circuits in ambipolar carbon nanotube technology. | M. Haykel Ben Jamaa, Kartik Mohanram, Giovanni De Micheli |
| 2010 | ICCAD | Bi-decomposition of large Boolean functions using blocking edge graphs. | Mihir R. Choudhury, Kartik Mohanram |
| 2009 | DAC | Timing-driven optimization using lookahead logic circuits. | Mihir R. Choudhury, Kartik Mohanram |
| 2009 | DATE | Masking timing errors on speed-paths in logic circuits. | Mihir R. Choudhury, Kartik Mohanram |
| 2009 | DATE | Novel library of logic gates with ambipolar CNTFETs: Opportunities for multi-level logic synthesis. | M. Haykel Ben Jamaa, Kartik Mohanram, Giovanni De Micheli |
| 2008 | DAC | Technology exploration for graphene nanoribbon FETs. | Mihir R. Choudhury, Youngki Yoon, Jing Guo, Kartik Mohanram |
| 2008 | DATE | Approximate logic circuits for low overhead, non-intrusive concurrent error detection. | Mihir R. Choudhury, Kartik Mohanram |
| 2008 | ETS | Tunable Transient Filters for Soft Error Rate Reduction in Combinational Circuits. | Quming Zhou, Mihir R. Choudhury, Kartik Mohanram |
| 2008 | ICCAD | Graphene nanoribbon FETs: technology exploration and CAD. | Kartik Mohanram, Jing Guo |
| 2007 | DATE | Accurate and scalable reliability analysis of logic circuits. | Mihir R. Choudhury, Kartik Mohanram |
| 2007 | DATE | Interactive presentation: Single-ended coding techniques for off-chip interconnects to commodity memory. | Mihir R. Choudhury, Kyle Ringgenberg, Scott Rixner, Kartik Mohanram |
| 2007 | ICCAD | Parallel domain decomposition for simulation of large-scale power grids. | Kai Sun, Quming Zhou, Kartik Mohanram, Danny C. Sorensen |
| 2007 | ISLPED | Power signal processing: a new perspective for power analysis and optimization. | Quming Zhou, Lin Zhong, Kartik Mohanram |
| 2006 | ASPLOS | Dependable != unaffordable. | Alan L. Cox, Kartik Mohanram, Scott Rixner |
| 2006 | DAC | Elmore model for energy estimation in RC trees. | Quming Zhou, Kartik Mohanram |
| 2006 | DATE | Large power grid analysis using domain decomposition. | Quming Zhou, Kai Sun, Kartik Mohanram, Danny C. Sorensen |
| 2006 | ICCAD | Design optimization for single-event upset robustness using simultaneous dual-VDD and sizing techniques. | Mihir R. Choudhury, Quming Zhou, Kartik Mohanram |
| 2006 | VTS | Design Optimization for Robustness to Single Event Upsets. | Quming Zhou, Mihir R. Choudhury, Kartik Mohanram |
| 2005 | DAC | Structure preserving reduction of frequency-dependent interconnect. | Quming Zhou, Kartik Mohanram, Athanasios C. Antoulas |
| 2005 | ITC | Simulation of transients caused by single-event upsets in combinational logic. | Kartik Mohanram |
| 2005 | VTS | Closed-Form Simulation and Robustness Models for SEU-Tolerant Design. | Kartik Mohanram |
| 2004 | ICCAD | Cost-effective radiation hardening technique for combinational logic. | Quming Zhou, Kartik Mohanram |
| 2004 | ITC | Analysis of delay caused by bridging faults in RLC interconnects. | Quming Zhou, Kartik Mohanram |
| 2003 | IOLTS | Synthesis of Low-Cost Parity-Based Partially Self-Checking Circuits. | Kartik Mohanram, Egor S. Sogomonyan, Michael Gssel, Nur A. Touba |
| 2003 | ITC | Cost-Effective Approach for Reducing Soft Error Failure Rate in Logic Circuits. | Kartik Mohanram, Nur A. Touba |
| 2003 | VTS | Eliminating Non-Determinism During Test of High-Speed Source Synchronous Differential Buses. | Kartik Mohanram, Nur A. Touba |
| 2002 | ISCAS | A methodology for automated insertion of concurrent error detection hardware in synthesizable Verilog RTL. | Kartik Mohanram, C. V. Krishna, Nur A. Touba |