| 2025 | HRI | Low Impedance Rendering Toward Safe Human-Robot Interaction. | Wonbum Yun, Kiyoung Choi, Junyoung Kim, Sehoon Oh, Hyun-Joon Chung |
| 2025 | ICRA | Robust Orientation Control of Robot Manipulator Using Orientation Disturbance Observer. | Kiyoung Choi, Junho Song, Wonbum Yun, Sehoon Oh |
| 2024 | IROS | Identification of Flexible Joint Robot Inertia Matrix Using Frequency Response Analysis. | Kiyoung Choi, Junho Song, Wonbum Yun, Deokjin Lee, Sehoon Oh |
| 2022 | IECON | Human-Robot Interaction Force based Power Assistive Algorithm of Upper Limb Exoskeleton Robots Driven by a Series Elastic Actuator. | Deokjin Lee, Kiyoung Choi, Wonbum Yun, Sehoon Oh |
| 2021 | HPCA | GradPIM: A Practical Processing-in-DRAM Architecture for Gradient Descent. | Heesu Kim, Hanmin Park, Taehyun Kim, Kwanheum Cho, Eojin Lee, Soojung Ryu, Hyuk-Jae Lee, Kiyoung Choi, Jinho Lee |
| 2019 | AAAI | Network Recasting: A Universal Method for Network Architecture Transformation. | Joonsang Yu, Sungbum Kang, Kiyoung Choi |
| 2019 | ASPDAC | Cell division: weight bit-width reduction technique for convolutional neural network hardware accelerators. | Hanmin Park, Kiyoung Choi |
| 2019 | DAC | Acceleration of DNN Backward Propagation by Selective Computation of Gradients. | Gunhee Lee, Hanmin Park, Namhyung Kim, Joonsang Yu, Sujeong Jo, Kiyoung Choi |
| 2019 | ISCAS | Aging Gracefully with Approximation. | Jongho Kim, Heesu Kim, Hussam Amrouch, Jrg Henkel, Andreas Gerstlauer, Kiyoung Choi |
| 2019 | ISLPED | VCAM: Variation Compensation through Activation Matching for Analog Binarized Neural Networks. | Jaehyun Kim, Chaeun Lee, Jihun Kim, Yumin Kim, Cheol Seong Hwang, Kiyoung Choi |
| 2018 | ASPDAC | Architectures and algorithms for user customization of CNNs. | Barend Harris, Mansureh S. Moghaddam, Duseok Kang, Inpyo Bae, Euiseok Kim, Hyemi Min, Hansu Cho, Sukjin Kim, Bernhard Egger, Soonhoi Ha, Kiyoung Choi |
| 2018 | ICCD | Training Neural Networks with Low Precision Dynamic Fixed-Point. | Sujeong Jo, Hanmin Park, Gunhee Lee, Kiyoung Choi |
| 2018 | ICS | ComPEND: Computation Pruning through Early Negative Detection for ReLU in a Deep Neural Network Accelerator. | Dongwoo Lee, Sungbum Kang, Kiyoung Choi |
| 2017 | ASPDAC | Scalable stochastic-computing accelerator for convolutional neural networks. | Hyeon Uk Sim, Dong Nguyen, Jongeun Lee, Kiyoung Choi |
| 2017 | CASES | Incremental training of CNNs for user customization: work-in-progress. | Mansureh S. Moghaddam, Barend Harris, Duseok Kang, Inpyo Bae, Euiseok Kim, Hyemi Min, Hansu Cho, Sukjin Kim, Bernhard Egger, Soonhoi Ha, Kiyoung Choi |
| 2017 | CGO | A space- and energy-efficient code Compression/Decompression technique for coarse-grained reconfigurable architectures. | Bernhard Egger, Hochan Lee, Duseok Kang, Mansureh S. Moghaddam, Youngchul Cho, Yeonbok Lee, Sukjin Kim, Soonhoi Ha, Kiyoung Choi |
| 2017 | DATE | Design space exploration of FPGA accelerators for convolutional neural networks. | Atul Rahman, Sangyun Oh, Jongeun Lee, Kiyoung Choi |
| 2017 | ICCD | Accurate and Efficient Stochastic Computing Hardware for Convolutional Neural Networks. | Joonsang Yu, Kyounghoon Kim, Jongeun Lee, Kiyoung Choi |
| 2016 | ASPDAC | An energy-efficient random number generator for stochastic circuits. | Kyounghoon Kim, Jongeun Lee, Kiyoung Choi |
| 2016 | DAC | Dynamic energy-accuracy trade-off using stochastic computing in deep neural networks. | Kyounghoon Kim, Jungki Kim, Joonsang Yu, Jungwoo Seo, Jongeun Lee, Kiyoung Choi |
| 2016 | DATE | Adaptive delay monitoring for wide voltage-range operation. | Jongho Kim, Gunhee Lee, Kiyoung Choi, Yonghwan Kim, Wook Kim, Kyung Tae Do, Jung Yun Choi |
| 2016 | DATE | Buffered compares: Excavating the hidden parallelism inside DRAM architectures with lightweight logic. | Jinho Lee, Jung Ho Ahn, Kiyoung Choi |
| 2016 | DATE | Efficient FPGA acceleration of Convolutional Neural Networks using logical-3D compute array. | Atul Rahman, Jongeun Lee, Kiyoung Choi |
| 2015 | ASPDAC | THOR: Orchestrated thermal management of cores and networks in 3D many-core architectures. | Jinho Lee, Junwhan Ahn, Kiyoung Choi, Kyungsu Kang |
| 2015 | ISCA | A scalable processing-in-memory accelerator for parallel graph processing. | Junwhan Ahn, Sungpack Hong, Sungjoo Yoo, Onur Mutlu, Kiyoung Choi |
| 2015 | ISCA | PIM-enabled instructions: a low-overhead, locality-aware processing-in-memory architecture. | Junwhan Ahn, Sungjoo Yoo, Onur Mutlu, Kiyoung Choi |
| 2014 | ASPDAC | Leveraging parallelism in the presence of control flow on CGRAs. | Jihyun Ryoo, Kyuseung Han, Kiyoung Choi |
| 2014 | DAC | Dynamic Power Management of Off-Chip Links for Hybrid Memory Cubes. | Junwhan Ahn, Sungjoo Yoo, Kiyoung Choi |
| 2014 | HPCA | DASCA: Dead Write Prediction Assisted STT-RAM Cache Architecture. | Junwhan Ahn, Sungjoo Yoo, Kiyoung Choi |
| 2014 | MICRO | Tree-Mesh Heterogeneous Topology for Low-Latency NoC. | Sungju Han, Jinho Lee, Kiyoung Choi |
| 2013 | ASPDAC | Selectively protecting error-correcting code for area-efficient and reliable STT-RAM caches. | Junwhan Ahn, Sungjoo Yoo, Kiyoung Choi |
| 2013 | ASPDAC | Deflection routing in 3D Network-on-Chip with TSV serialization. | Jinho Lee, Dongwook Lee, Sunwook Kim, Kiyoung Choi |
| 2013 | DATE | Compiling control-intensive loops for CGRAs with state-based full predication. | Kyuseung Han, Kiyoung Choi, Jongeun Lee |
| 2013 | ISLPED | Write intensity prediction for energy-efficient non-volatile caches. | Junwhan Ahn, Sungjoo Yoo, Kiyoung Choi |
| 2013 | MICRO | Towards optimal adaptive routing in 3D NoC with limited vertical bandwidth. | Gunhee Lee, Jinho Lee, Kiyoung Choi |
| 2012 | ASPDAC | Memory-aware mapping and scheduling of tasks and communications on many-core SoC. | Jinho Lee, Kiyoung Choi |
| 2012 | DATE | State-based full predication for low power coarse-grained reconfigurable architecture. | Kyuseung Han, Seongsik Park, Kiyoung Choi |
| 2012 | ISCAS | Lower-bits cache for low power STT-RAM caches. | Junwhan Ahn, Kiyoung Choi |
| 2012 | MICRO | Position-based weighted round-robin arbitration for equality of service in many-core network-on-chips. | Hanmin Park, Kiyoung Choi |
| 2011 | ASPDAC | A polynomial-time custom instruction identification algorithm based on dynamic programming. | Junwhan Ahn, Imyong Lee, Kiyoung Choi |
| 2011 | ICCAD | High-level synthesis with distributed controller for fast timing closure. | Seokhyun Lee, Kiyoung Choi |
| 2009 | ASPDAC | Code decomposition and recomposition for enhancing embedded software performance. | Youngchul Cho, Kiyoung Choi |
| 2009 | DAC | Multiprocessor System-on-Chip designs with active memory processors for higher memory efficiency. | Jun-hee Yoo, Sungjoo Yoo, Kiyoung Choi |
| 2008 | ISLPED | Entry control in network-on-chip for memory power reduction. | Dongwook Lee, Sungjoo Yoo, Kiyoung Choi |
| 2007 | ASPDAC | Communication Architecture Synthesis of Cascaded Bus Matrix. | Jun-hee Yoo, Dongwook Lee, Sungjoo Yoo, Kiyoung Choi |
| 2007 | RSP | Low Runtime-Overhead Software Synthesis for Communicating Concurrent Processes. | Youngchul Cho, Nacer-Eddine Zergainoh, Kiyoung Choi, Ahmed Amine Jerraya |
| 2007 | RTCSA | Buffer Size Reduction through Control-Flow Decomposition. | Youngchul Cho, Nacer-Eddine Zergainoh, Ahmed Amine Jerraya, Kiyoung Choi |
| 2006 | ASPDAC | Worst case execution time analysis for synthesized hardware. | Jun-hee Yoo, Xingguang Feng, Kiyoung Choi, Eui-Young Chung, Kyu-Myung Choi |
| 2006 | DATE | A spatial mapping algorithm for heterogeneous coarse-grained reconfigurable architectures. | Minwook Ahn, Jonghee W. Yoon, Yunheung Paek, Yoonjin Kim, Mary Kiemb, Kiyoung Choi |
| 2006 | ISLPED | Power-conscious configuration cache structure and code mapping for coarse-grained reconfigurable architecture. | Yoonjin Kim, Ilhyun Park, Kiyoung Choi, Yunheung Paek |
| 2005 | ASPDAC | Scheduler implementation in MP SoC design. | Youngchul Cho, Sungjoo Yoo, Kiyoung Choi, Nacer-Eddine Zergainoh, Ahmed Amine Jerraya |
| 2005 | DATE | Resource Sharing and Pipelining in Coarse-Grained Reconfigurable Architecture for Domain-Specific Optimization. | Yoonjin Kim, Mary Kiemb, Chulsoo Park, Jinyong Jung, Kiyoung Choi |
| 2004 | CASES | Memory and architecture exploration with thread shifting for multithreaded processors in embedded systems. | Mary Kiemb, Kiyoung Choi |
| 2004 | ICRA | A Mobility Analysis Method of Closed-chain Mechanisms with Over-constraints and Non-holonomic Constraints. | Whee Kuk Kim, Kiyoung Choi, Byung-Ju Yi |
| 2004 | ISCAS | Application-specific configuration of multithreaded processor architecture for embedded applications. | Mary Kiemb, Kiyoung Choi |
| 2003 | DATE | Scheduling and Timing Analysis of HW/SW On-Chip Communication in MP SoC Design. | Youngchul Cho, Ganghee Lee, Sungjoo Yoo, Kiyoung Choi, Nacer-Eddine Zergainoh |
| 2003 | ISLPED | Energy-efficient instruction set synthesis for application-specific processors. | Jong-eun Lee, Kiyoung Choi, Nikil D. Dutt |
| 2002 | ICCAD | Efficient instruction encoding for automatic instruction set design of configurable ASIPs. | Jong-eun Lee, Kiyoung Choi, Nikil D. Dutt |
| 2002 | ISLPED | An intra-task dynamic voltage scaling method for SoC design with hierarchical FSM and synchronous dataflow model. | Sunghyun Lee, Kiyoung Choi, Sungjoo Yoo |
| 2001 | ASPDAC | High-level synthesis under multi-cycle interconnect delay. | Jinhwan Jeon, Daehong Kim, Dongwan Shin, Kiyoung Choi |
| 2001 | DATE | Performance improvement of multi-processor systems cosimulation based on SW analysis. | Jinyong Jung, Sungjoo Yoo, Kiyoung Choi |
| 2001 | ICCAD | Behavior-to-Placed RTL Synthesis with Performance-Driven Placement. | Daehong Kim, Jinyong Jung, Sunghyun Lee, Jinhwan Jeon, Kiyoung Choi |
| 2001 | ISLPED | Low power pipelining of linear systems: a common operand centric approach. | Daehong Kim, Dongwan Shin, Kiyoung Choi |
| 2000 | ASPDAC | Hardware-software cosynthesis for run-time incrementally reconfigurable FPGAs. | Byungil Jeong, Sungjoo Yoo, Sunghyun Lee, Kiyoung Choi |
| 2000 | ASPDAC | Narrow bus encoding for low power systems. | Youngsoo Shin, Kiyoung Choi |
| 2000 | DAC | Schedulability-driven performance analysis of multiple mode embedded real-time systems. | Youngsoo Shin, Daehong Kim, Kiyoung Choi |
| 2000 | DATE | Fast Hardware-Software Coverification by Optimistic Execution of Real Processor. | Sungjoo Yoo, Jong-eun Lee, Jinyong Jung, Kyungseok Rha, Youngchul Cho, Kiyoung Choi |
| 2000 | ICCAD | Power Optimization of Real-Time Embedded Systems on Variable Speed Processors. | Youngsoo Shin, Kiyoung Choi, Takayasu Sakurai |
| 2000 | ISCAS | A new cost model for high-level power optimization and its application. | Taekyoon Ahn, Kiyoung Choi, Ki-Hyun Kim, Seong-Kwan Hon |
| 2000 | ISLPED | Power minimization of functional units partially guarded computation. | Junghwan Choi, Jinhwan Jeon, Kiyoung Choi |
| 2000 | ISLPED | Low power self-timed Radix-2 division (poster session). | Jae-Hee Won, Kiyoung Choi |
| 1999 | DAC | Performance-Driven Scheduling with Bit-Level Chaining. | Sanghun Park, Kiyoung Choi |
| 1999 | DAC | Power Conscious Fixed Priority Scheduling for Hard Real-Time Systems. | Youngsoo Shin, Kiyoung Choi |
| 1999 | FPGA | Exploiting Early Partial Reconfiguration of Run-Time Reconfigurable FPGAs in Embedded Systems Design. | Byungil Jeong, Sungjoo Yoo, Kiyoung Choi |
| 1998 | ASPDAC | Loop Pipelining in Hardware-Software Partitioning. | Jinhwan Jeon, Kiyoung Choi |
| 1998 | ISLPED | Partial bus-invert coding for power optimization of system level bus. | Youngsoo Shin, Soo-Ik Chae, Kiyoung Choi |
| 1997 | DAC | Power-conscious High Level Synthesis Using Loop Folding. | Daehong Kim, Kiyoung Choi |
| 1997 | ISLPED | Low power high level synthesis by increasing data correlation. | Dongwan Shin, Kiyoung Choi |
| 1996 | DATE | Thread-based software synthesis for embedded system design. | Youngsoo Shin, Kiyoung Choi |
| 1996 | ICCAD | Software synthesis through task decomposition by dependency analysis. | Youngsoo Shin, Kiyoung Choi |
| 1996 | RSP | An integrated hardware-software cosimulation environment with automated interface generation. | Kyuseok Kim, Yongjoo Kim, Youngsoo Shin, Kiyoung Choi |
| 1996 | RTCSA | Hardware-Software Codesign of Resource-Constrained Real-Time Systems. | Sungjoo Yoo, Jinhwan Jeon, Seongsoo Hong, Kiyoung Choi |
| 1995 | ASPDAC | An integrated hardware-software cosimulation environment for heterogeneous systems prototyping. | Yongjoo Kim, Kyuseok Kim, Youngsoo Shin, Taekyoon Ahn, Wonyong Sung, Kiyoung Choi, Soonhoi Ha |
| 1995 | ISCAS | Efficient Prototyping System Based on Incremental Design and Module-by-Module Verification. | Yongjoo Kim, Youngsoo Shin, Kyuseok Kim, Jae-Hee Won, Kiyoung Choi |
| 1994 | ICCD | A Self-Timed Divider Using RSD Number System. | Kiyoung Choi, KiJong Lee, Jun-Woo Kang |
| 1988 | DAC | Incremental-in-time Algorithm for Digital Simulation. | Kiyoung Choi, Sun Young Hwang, Tom Blank |