Maksim Jenihhin
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
48
Venues
10
Active years
2007–2026
Best venue rank
C
Where they publish
Papers
48 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | ETS | NURSE: A Distributed Architecture for Runtime Fault Management in Processor Designs. | Ashwin Santhosh, Artur Jutman, Endri Kaja, Wolfgang Ecker, Maksim Jenihhin |
| 2026 | IOLTS | Scalable Reliability Assessment of Vision Transformers on Systolic Arrays via Fault Propagation Analysis. | Natalia Cherezova, Artur Jutman, Maksim Jenihhin |
| 2026 | VTS | Special Session: Reliability Assessment of DNN Models and Inference on Systolic Arrays. | Natalia Cherezova, Salvatore Pappalardo, Annachiara Ruospo, Bastien Deveautour, Lorenzo Fezza, Artur Jutman, Ernesto Snchez, Alberto Bosio, Matteo Sonza Reorda, Maksim Jenihhin |
| 2026 | VTS | FT-Sparse: Algorithm-Based Fault Tolerance for Sparse CNNs Using Structured Sparsity in GPUs. | Josie E. Rodriguez Condia, Mohammad Hasan Ahmadilivani, Jaan Raik, Maksim Jenihhin, Matteo Sonza Reorda |
| 2025 | DDECS | RL-Agent-based Early-Exit DNN Architecture Search Framework. | Mahdi Taheri, Parth Patne, Natalia Cherezova, Ali Mahani, Christian Herglotz, Maksim Jenihhin |
| 2025 | DSN | XMULT: An Energy-Efficient Design of Approximate Multiplier. | Ahsan Rafiq, Maksim Jenihhin |
| 2025 | ETS | European Test Symposium Teams: an Anniversary Snapshot. | Maksim Jenihhin, Jaan Raik, Artur Jutman, Natalia Cherezova, Raimund Ubar, Liviu Miclea, Szilrd Enyedi, Iulia Stefan, Ovidiu Stan, Cosmina Corches, Zebo Peng, Petru Eles, Rolf Drechsler, S. Eggersgl, Grschwin Fey, Andreas Glowatz, Daniel Tille, Georges G. E. Gielen, Anthony Coyette, Wim Dobbelaere, Ronny Vanhooren, Po-Yao Chuang, Erik Jan Marinissen, Giorgio Di Natale, M. Barragan, Paolo Maistri, S. Mir, Vatajelu I. Vatajelu, Paolo Bernardi, Stefano Di Carlo, Paolo Prinetto, Matteo Sonza Reorda, Massimo Violante, Haralampos-G. Stratigopoulos, M. K. Michael, Stelios Neophytou, Stavros Hadjitheophanous, Kyriakos Christou, M. Skitsas, Alberto Bosio, Bastien Deveautour, Patrick Girard, Marcello Traiola, Arnaud Virazel, Fernando Fernandes dos Santos, Angeliki Kritikakou, Gioele Casagranda, Marzio Vallero, Flavio Vella, Paolo Rech, Letcia Maria Bolzani Poehls, Milos Krstic, Marko S. Andjelkovic, Fabian Luis Vargas, Grigor Tshagharyan, Gurgen Harutyunyan, Valery A. Vardanian, Samvel K. Shoukourian, Yervant Zorian, Jennifer Dworak, Kundan Nepal, Theodore W. Manikas, Mottaqiallah Taouil, Moritz Fieback, Anteneh Gebregiorgis, Rajendra Bishnoi, Said Hamdioui, Abhijit Chatterjee, Anurup Saha, Suhasini Komarraju, K. Ma, Chandramouli N. Amarnath, Mehdi Baradaran Tahoori, Mahta Mayahinia, Maryam Rajabalipanah, Katayoon Basharkhah, N. Nosrati, Zahra Jahanpeima, Zain Navabi, Hans-Joachim Wunderlich, Sybille Hellebrand |
| 2025 | IOLTS | SHIELD: PSO-Based Hardware Trojan Detection for Efficient and Low-Cost Defense. | Mostafa Hosseini, Ali Azarpeyvand, Mahdi Taheri, Tara Ghasempouri, Maksim Jenihhin |
| 2024 | DDECS | SAFFIRA: a Framework for Assessing the Reliability of Systolic-Array-Based DNN Accelerators. | Mahdi Taheri, Masoud Daneshtalab, Jaan Raik, Maksim Jenihhin, Salvatore Pappalardo, Paul Jimnez, Bastien Deveautour, Alberto Bosio |
| 2024 | ETS | AdAM: Adaptive Fault-Tolerant Approximate Multiplier for Edge DNN Accelerators. | Mahdi Taheri, Natalia Cherezova, Samira Nazari, Ahsan Rafiq, Ali Azarpeyvand, Tara Ghasempouri, Masoud Daneshtalab, Jaan Raik, Maksim Jenihhin |
| 2024 | IOLTS | Cost-Effective Fault Tolerance for CNNs Using Parameter Vulnerability Based Hardening and Pruning. | Mohammad Hasan Ahmadilivani, Seyedhamidreza Mousavi, Jaan Raik, Masoud Daneshtalab, Maksim Jenihhin |
| 2024 | VTS | Special Session: Reliability Assessment Recipes for DNN Accelerators. | Mohammad Hasan Ahmadilivani, Alberto Bosio, Bastien Deveautour, Fernando Fernandes dos Santos, Juan-David Guerrero-Balaguera, Maksim Jenihhin, Angeliki Kritikakou, Robert Limas Sierra, Salvatore Pappalardo, Jaan Raik, Josie E. Rodriguez Condia, Matteo Sonza Reorda, Mahdi Taheri, Marcello Traiola |
| 2023 | DDECS | APPRAISER: DNN Fault Resilience Analysis Employing Approximation Errors. | Mahdi Taheri, Mohammad Hasan Ahmadilivani, Maksim Jenihhin, Masoud Daneshtalab, Jaan Raik |
| 2023 | ETS | DeepVigor: VulnerabIlity Value RanGes and FactORs for DNNs' Reliability Assessment. | Mohammad Hasan Ahmadilivani, Mahdi Taheri, Jaan Raik, Masoud Daneshtalab, Maksim Jenihhin |
| 2023 | IOLTS | ML-Based Online Design Error Localization for RISC-V Implementations. | Hardi Selg, Maksim Jenihhin, Peeter Ellervee, Jaan Raik |
| 2023 | VTS | Special Session: Approximation and Fault Resiliency of DNN Accelerators. | Mohammad Hasan Ahmadilivani, Mario Barbareschi, Salvatore Barone, Alberto Bosio, Masoud Daneshtalab, Salvatore Della Torca, Gabriele Gavarini, Maksim Jenihhin, Jaan Raik, Annachiara Ruospo, Ernesto Snchez, Mahdi Taheri |
| 2022 | IOLTS | MLC: A Machine Learning Based Checker For Soft Error Detection In Embedded Processors. | Nooshin Nosrati, Maksim Jenihhin, Zainalabedin Navabi |
| 2022 | IOLTS | A Novel Fault-Tolerant Logic Style with Self-Checking Capability. | Mahdi Taheri, Saeideh Sheikhpour, Ali Mahani, Maksim Jenihhin |
| 2021 | DSD | Implementation-Independent Test Generation for a Large Class of Faults in RISC Processor Modules. | Maksim Jenihhin, Adeboye Stephen Oyeniran, Jaan Raik, Raimund Ubar |
| 2021 | MEDI | Edge-to-Fog Collaborative Computing in a Swarm of Drones. | Dadmehr Rahbari, Muhammad Mahtab Alam, Yannick Le Moullec, Maksim Jenihhin |
| 2020 | DATE | RESCUE: Interdependent Challenges of Reliability, Security and Quality in Nanoelectronic Systems. | Maksim Jenihhin, Said Hamdioui, Matteo Sonza Reorda, Milos Krstic, Peter Langendrfer, Christian Sauer, Anton Klotz, Michael Hbner, Jrg Nolte, Heinrich Theodor Vierhaus, Georgios N. Selimis, Dan Alexandrescu, Mottaqiallah Taouil, Geert Jan Schrijen, Jaan Raik, Luca Sterpone, Giovanni Squillero, Zoya Dyka |
| 2020 | DATE | A DFT Scheme to Improve Coverage of Hard-to-Detect Faults in FinFET SRAMs. | Guilherme Cardoso Medeiros, Cemil Cem Grsoy, Lizhou Wu, Moritz Fieback, Maksim Jenihhin, Mottaqiallah Taouil, Said Hamdioui |
| 2020 | DSD | Implementation-Independent Functional Test for Transition Delay Faults in Microprocessors. | Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Jaan Raik |
| 2020 | IOLTS | Representing Gate-Level SET Faults by Multiple SEU Faults at RTL. | Ahmet Cagri Bagbaba, Maksim Jenihhin, Raimund Ubar, Christian Sauer |
| 2020 | VTS | Special Session: AutoSoC - A Suite of Open-Source Automotive SoC Benchmarks. | Felipe Augusto da Silva, Ahmet Cagri Bagbaba, Annachiara Ruospo, Riccardo Mariani, Ghani Kanawati, Ernesto Snchez, Matteo Sonza Reorda, Maksim Jenihhin, Said Hamdioui, Christian Sauer |
| 2019 | DDECS | New categories of Safe Faults in a processor-based Embedded System. | Cemil Cem Grsoy, Maksim Jenihhin, Adeboye Stephen Oyeniran, Davide Piumatti, Jaan Raik, Matteo Sonza Reorda, Raimund Ubar |
| 2019 | DSD | True Path Tracing in Structurally Synthesized BDDs for Testability Analysis of Digital Circuits. | Raimund Ubar, Lembit Jrimgi, Adeniyi Olanrewaju Adekoya, Maksim Jenihhin |
| 2019 | ETS | High-Level Combined Deterministic and Pseudo-exhuastive Test Generation for RISC Processors. | Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Cemil Cem Grsoy, Jaan Raik |
| 2019 | IOLTS | Efficient Fault Injection based on Dynamic HDL Slicing Technique. | Ahmet Cagri Bagbaba, Maksim Jenihhin, Jaan Raik, Christian Sauer |
| 2019 | IOLTS | Application Specific True Critical Paths Identification in Sequential Circuits. | Lembit Jrimgi, Raimund Ubar, Maksim Jenihhin, Jaan Raik, Sergei Devadze, Adeboye Stephen Oyeniran |
| 2019 | IOLTS | PASCAL: Timing SCA Resistant Design and Verification Flow. | Xinhui Lai, Maksim Jenihhin, Jaan Raik, Kolin Paul |
| 2018 | DDECS | QoSinNoC: Analysis of QoS-Aware NoC Architectures for Mixed-Criticality Applications. | Serhiy Avramenko, Siavoosh Payandeh Azad, Stefano Esposito, Behrad Niazmand, Massimo Violante, Jaan Raik, Maksim Jenihhin |
| 2018 | DDECS | Software-Level TMR Approach for On-Board Data Processing in Space Applications. | Karl Janson, Carl Johann Treudler, Thomas Hollstein, Jaan Raik, Maksim Jenihhin, Grschwin Fey |
| 2017 | DATE | BASTION: Board and SoC test instrumentation for ageing and no failure found. | Artur Jutman, Christophe Lotz, Erik Larsson, Matteo Sonza Reorda, Maksim Jenihhin, Jaan Raik, Hans G. Kerkhoff, Rene Krenz-Baath, Piet Engelke |
| 2017 | DDECS | A scalable technique to identify true critical paths in sequential circuits. | Raimund Ubar, Sergei Kostin, Maksim Jenihhin, Jaan Raik |
| 2017 | ICTERI | Multi-Fragment Markov Model Guided Online Test Generation for MPSoC. | Jri Vain, Leonidas Tsiopoulos, Vyacheslav S. Kharchenko, Apneet Kaur, Maksim Jenihhin, Jaan Raik |
| 2016 | FDL | Designing reliable cyber-physical systems overview associated to the special session at FDL'16. | Gadi Aleksandrowicz, Eli Arbel, Roderick Bloem, Timon D. ter Braak, Sergei Devadze, Grschwin Fey, Maksim Jenihhin, Artur Jutman, Hans G. Kerkhoff, Robert Knighofer, Jan Malburg, Shiri Moran, Jaan Raik, Gerard K. Rauwerda, Heinz Riener, Franz Rck, Konstantin Shibin, Kim Sunesen, Jinbo Wan, Yong Zhao |
| 2015 | DDECS | SystemC-Based Loose Models for Simulation Speed-Up by Abstraction of RTL IP Cores. | Syed Saif Abrar, Maksim Jenihhin, Jaan Raik |
| 2015 | DDECS | SPICE-Inspired Fast Gate-Level Computation of NBTI-induced Delays in Nanoscale Logic. | Sergei Kostin, Jaan Raik, Raimund Ubar, Maksim Jenihhin, Thiago Copetti, Fabian Vargas, Letcia Maria Bolzani Phls |
| 2013 | DDECS | Extensible open-source framework for translating RTL VHDL IP cores to SystemC. | Syed Saif Abrar, Maksim Jenihhin, Jaan Raik |
| 2013 | DSD | Identifying NBTI-Critical Paths in Nanoscale Logic. | Raimund Ubar, Fabian Vargas, Maksim Jenihhin, Jaan Raik, Sergei Kostin, Letcia Maria Bolzani Poehls |
| 2012 | ETS | Combining dynamic slicing and mutation operators for ESL correction. | Urmas Repinski, Hanno Hantson, Maksim Jenihhin, Jaan Raik, Raimund Ubar, Giuseppe Di Guglielmo, Graziano Pravadelli, Franco Fummi |
| 2011 | ETS | Constraint-Based Hierarchical Untestability Identification for Synchronous Sequential Circuits. | Jaan Raik, Anna Rannaste, Maksim Jenihhin, Taavi Viilukas, Raimund Ubar, Hideo Fujiwara |
| 2010 | DDECS | Constraint-based test pattern generation at the Register-Transfer Level. | Taavi Viilukas, Jaan Raik, Maksim Jenihhin, Raimund Ubar, Anna Krivenko |
| 2008 | DDECS | Code Coverage Analysis using High-Level Decision Diagrams. | Jaan Raik, Uljana Reinsalu, Raimund Ubar, Maksim Jenihhin, Peeter Ellervee |
| 2008 | DSD | Hierarchical Analysis of Short Defects between Metal Lines in CMOS IC. | Witold A. Pleskacz, Maksim Jenihhin, Jaan Raik, Michal Rakowski, Raimund Ubar, Wieslaw Kuzmicz |
| 2008 | ETS | Temporally Extended High-Level Decision Diagrams for PSL Assertions Simulation. | Maksim Jenihhin, Jaan Raik, Anton Chepurov, Raimund Ubar |
| 2007 | DDECS | Layout to Logic Defect Analysis for Hierarchical Test Generation. | Maksim Jenihhin, Jaan Raik, Raimund Ubar, Witold A. Pleskacz, Michal Rakowski |