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Maurizio Rebaudengo

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

67

Venues

27

Active years

1993–2022

Best venue rank

A*

Where they publish

Papers

67 indexed papers, newest first.

YearVenueTitleAuthors
2022DSNReliability assessment of FreeRTOS in Embedded Systems.Alberto Bosio, Maurizio Rebaudengo, Alessandro Savino
2021ETFALow-cost PM Sensor Behaviour Based on Duty-Cycle Analysis.Gustavo Ramirez Espinosa, Bartolomeo Montrucchio, Edoardo Giusto, Maurizio Rebaudengo
2021ICDEAnalyzing In-Memory NoSQL Landscape (Extended Abstract).Masoud Hemmatpour, Bartolomeo Montrucchio, Maurizio Rebaudengo, Mohammad Sadoghi
2021VTSSpecial Session: Operating Systems under test: an overview of the significance of the operating system in the resiliency of the computing continuum.Emmanuel Casseau, Petr Dobis, Oliver Sinnen, Gennaro Severino Rodrigues, Fernanda Lima Kastensmidt, Alessandro Savino, Stefano Di Carlo, Maurizio Rebaudengo, Alberto Bosio
2018ETFAParticulate Matter Monitoring in Mixed Indoor/Outdoor Industrial Applications: A Case Study.Edoardo Giusto, Renato Ferrero, Filippo Gandino, Bartolomeo Montrucchio, Maurizio Rebaudengo, Mingyang Zhang
2017COMPSACDIIG: A Distributed Industrial IoT Gateway.Masoud Hemmatpour, Mohammad Ghazivakili, Bartolomeo Montrucchio, Maurizio Rebaudengo
2017COMPSACPolynomial classification model for real-time fall prediction system.Masoud Hemmatpour, Milad Karimshoushtari, Renato Ferrero, Bartolomeo Montrucchio, Maurizio Rebaudengo, Carlo Novara
2016MiddlewareKanzi: A Distributed, In-memory Key-Value Store.Masoud Hemmatpour, Bartolomeo Montrucchio, Maurizio Rebaudengo, Mohammad Sadoghi
2015INDINAn innovative parallel fuzzy scheme for low-power consumption in IEEE 802.11 devices.Mario Collotta, Salvatore Tirrito, Renato Ferrero, Maurizio Rebaudengo
2014ETFAA parallel fuzzy scheme to improve power consumption management in Wireless Sensor Networks.Mario Collotta, Gianfranco Scat, Salvatore Tirrito, Renato Ferrero, Maurizio Rebaudengo
2013AINASimulating Reader-to-Reader Interference in RFID Systems.Renato Ferrero, Filippo Gandino, Linchao Zhang, Bartolomeo Montrucchio, Maurizio Rebaudengo
2013MOMMSimulation and Evaluation of the Interference Models for RFID Reader-to-Reader Collisions.Linchao Zhang, Renato Ferrero, Filippo Gandino, Maurizio Rebaudengo
2011EUCEvaluation Framework of Opportunistic Flooding in Wireless Sensor Networks.Linchao Zhang, Erwing Ricardo Sanchez, Maurizio Rebaudengo
2009CoNEXTRandom key pre-distribution with transitory master key for wireless sensor networks.Filippo Gandino, Bartolomeo Montrucchio, Maurizio Rebaudengo
2009NCAIntroducing Probability in RFID Reader-to-Reader Anti-collision.Filippo Gandino, Renato Ferrero, Bartolomeo Montrucchio, Maurizio Rebaudengo
2007AINAAgri-Food Traceability Management using a RFID System with Privacy Protection.Paolo Bernardi, Claudio Demartini, Filippo Gandino, Bartolomeo Montrucchio, Maurizio Rebaudengo, Erwing Ricardo Sanchez
2006ITCEmbedded Memory Diagnosis: An Industrial Workflow.Davide Appello, Vincenzo Tancorre, Paolo Bernardi, Michelangelo Grosso, Maurizio Rebaudengo, Matteo Sonza Reorda
2006VTSOn the Automation of the Test Flow of Complex SoCs.Davide Appello, Vincenzo Tancorre, Paolo Bernardi, Michelangelo Grosso, Maurizio Rebaudengo, Matteo Sonza Reorda
2006VTSA Pattern Ordering Algorithm for Reducing the Size of Fault Dictionaries.Paolo Bernardi, Michelangelo Grosso, Maurizio Rebaudengo, Matteo Sonza Reorda
2005DSNOn-Line Detection of Control-Flow Errors in SoCs by Means of an Infrastructure IP Core.Paolo Bernardi, Letcia Maria Veiras Bolzani, Maurizio Rebaudengo, Matteo Sonza Reorda, Fabian Vargas, Massimo Violante
2005ETSExploiting an infrastructure IP to reduce memory diagnosis costs in SoCs.Paolo Bernardi, Michelangelo Grosso, Maurizio Rebaudengo, Matteo Sonza Reorda
2005IOLTSIntegrating BIST Techniques for On-Line SoC Testing.Alberto Manzone, Paolo Bernardi, Michelangelo Grosso, Maurizio Rebaudengo, Ernesto Snchez, Matteo Sonza Reorda
2004DATEEvaluating the Effects of SEUs Affecting the Configuration Memory of an SRAM-Based FPGA.M. Bellato, Paolo Bernardi, D. Bortolato, A. Candelori, M. Ceschia, Alessandro Paccagnella, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, P. Zambolin
2004IOLTSHybrid Soft Error Detection by Means of Infrastructure IP Cores.Letcia Maria Veiras Bolzani, Maurizio Rebaudengo, Matteo Sonza Reorda, Fabian Vargas, Massimo Violante
2003DATEA P1500-Compatible Programmable BIST Approach for the Test of Embedded Flash Memories.Paolo Bernardi, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2003DATEAn Accurate Analysis of the Effects of Soft Errors in the Instruction and Data Caches of a Pipelined Microprocessor.Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2003ETFAAn efficient algorithm for the extraction of compressed diagnostic information from embedded memory cores.Paolo Bernardi, Maurizio Rebaudengo, Matteo Sonza Reorda
2003IOLTSAnalyzing SEU Effects in SRAM-based FPGAs.Massimo Violante, M. Ceschia, Matteo Sonza Reorda, Alessandro Paccagnella, Paolo Bernardi, Maurizio Rebaudengo, D. Bortolato, M. Bellato, P. Zambolin, A. Candelori
2003ITCExploiting Programmable BIST For The Diagnosis of Embedded Memory Cores.Davide Appello, Paolo Bernardi, Alessandra Fudoli, Maurizio Rebaudengo, Matteo Sonza Reorda, Vincenzo Tancorre, Massimo Violante
2002FPLSimulation-Based Analysis of SEU Effects on SRAM-based FPGAs.Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2002IOLTSA BIST-Based Solution for the Diagnosis of Embedded Memories Adopting Image Processing Techniques.Davide Appello, Alessandra Fudoli, Vincenzo Tancorre, Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda
2002IOLTSAnalysis of SEU Effects in a Pipelined Processor.Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2001DATESystem safety through automatic high-level code transformations: an experimental evaluation.Ph. Cheynet, Bogdan Nicolescu, Raoul Velazco, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2001FPLFPGA-Based Fault Injection Techniques for Fast Evaluation of Fault Tolerance in VLSI Circuits.Pierluigi Civera, Luca Macchiarulo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2001IOLTSExploiting FPGA for Accelerating Fault Injection Experiments.Pierluigi Civera, Luca Macchiarulo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2001SCAMA Source-to-Source Compiler for Generating Dependable Software.Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Marco Torchiano
2000DATEEvaluating System Dependability in a Co-Design Framework.Marcello Lajolo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Luciano Lavagno
2000ETSSystem-level test bench generation in a co-design framework.Marcello Lajolo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Luciano Lavagno
2000IOLTSNew Techniques for Accelerating Fault Injection in VHDL Descriptions.B. Parrotta, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2000IOLTSEvaluating the Effectiveness of a Software Fault-Tolerance Technique on RISC- and CISC-Based Architectures.Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Ph. Cheynet, Bogdan Nicolescu, Raoul Velazco
2000VTSLow Power BIST via Non-Linear Hybrid Cellular Automata.Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda, Giovanni Squillero, Massimo Violante
2000SAFECOMPSpeeding-Up Fault Injection Campaigns in VHDL Models.B. Parrotta, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
1999ETSA new BIST architecture for low power circuits.Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
1999VTSEvaluating the Fault Tolerance Capabilities of Embedded Systems via BDM .Maurizio Rebaudengo, Matteo Sonza Reorda
1999SAFECOMPFlexFi: A Flexible Fault Injection Environment for Microprocessor-Based Systems.Alfredo Benso, Maurizio Rebaudengo, Matteo Sonza Reorda
1998ITCA fault injection environment for microprocessor-based boards.Alfredo Benso, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1998VTSA Test Pattern Generation Methodology for Low-Power Consumption.Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1998WCAEThe training environment for the course on microprocessor systems at the Politecnico di Torino.Maurizio Rebaudengo, Matteo Sonza Reorda
1997DATEA new approach to build a low-level malicious fault list starting from high-level description and alternative graphs.Alfredo Benso, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Raimund Ubar
1997DATENew static compaction techniques of test sequences for sequential circuits.Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1997ICCDA new Approach for Initialization Sequences Computation for Synchronous Sequential Circuits.Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Giovanni Squillero
1997ICTAIGA-Based Performance Analysis of Network Protocols.Mario Baldi, Fulvio Corno, Maurizio Rebaudengo, Giovanni Squillero
1997ICTAIExploiting Symbolic Techniques within Genetic Algorithms for Power Optimization.S. Chuisano, Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1997SACSAARA: a simulated annealing algorithm for test pattern generation for digital circuits.Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1996DATEAdvanced Techniques for GA-based sequential ATPGs.Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, R. Mosca
1996EDCCOn-line Testing of an Off-the-shelf Microprocessor Board for Safety-critical Applications.Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Maurizio Damiani, Leonardo Impagliazzo, G. Sartore
1996ITCComparing Topological, Symbolic and GA-based ATPGs: An Experimental Approach.Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1996ITCPartial Scan Flip Flop Selection for Simulation-Based Sequential ATPGs.Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1996PPSNExploiting Competing Subpopulations for Automatic Generation of Test Sequences for Digital Cicuits.Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1995DATEGARDA: a diagnostic ATPG for large synchronous sequential circuits.Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1995PDPAn improved data parallel algorithm for Boolean function manipulation using BDDs.Silvano Gai, Maurizio Rebaudengo, Matteo Sonza Reorda
1995VTSA portable ATPG tool for parallel and distributed systems.Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Enzo Veiluva
1994ICECA Genetic Algorithm for Floorplan Area Optimization.Matteo Sonza Reorda, Maurizio Rebaudengo
1994ICTAIGATTO: An Intelligent Tool for Automatic Test Pattern Generation for Digital Circuits.Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Enzo Veiluva
1994ITCAn Automatic Test Pattern Generator for Large Sequential Circuits Based on Genetic Algorithms.Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1994PDPA BDD Package For A Massively Parallel SIMD Architecture.Gianpiero Cabodi, Silvano Gai, Maurizio Rebaudengo, Matteo Sonza Reorda
1993PDPAn experimental analysis of the effects of migration in parallel genetic algorithms.Maurizio Rebaudengo, Matteo Sonza Reorda