| 2025 | FPL | Cocotb-Pynq: Co-Simulating Python+RTL Applications Targeting Pynq Platforms with Cocotb. | Gavin Lusby, Nachiket Kapre |
| 2023 | DATE | Ditty: Directory-based Cache Coherence for Multicore Safety-critical Systems. | Zhuanhao Wu, Marat Bekmyrza, Nachiket Kapre, Hiren D. Patel |
| 2022 | FCCM | Managing HBM Bandwidth on Multi-Die FPGAs with FPGA Overlay NoCs. | Srinirdheeshwar Kuttuva Prakash, Hiren D. Patel, Nachiket Kapre |
| 2021 | FCCM | Mocarabe: High-Performance Time-Multiplexed Overlays for FPGAs. | Frederick Tombs, Alireza Mellat, Nachiket Kapre |
| 2020 | FCCM | Exploring The Impact Of Switch Arity On Butterfly Fat Tree Fpga Nocs. | Ian Elmor Lang, Ziqiang Huang, Nachiket Kapre |
| 2020 | FPL | Learn the Switches: Evolving FPGA NoCs with Stall-Free and Backpressure Based Routers. | Gurshaant Malik, Ian Elmor Lang, Rodolfo Pellizzoni, Nachiket Kapre |
| 2020 | FPL | RapidLayout: Fast Hard Block Placement of FPGA-Optimized Systolic Arrays using Evolutionary Algorithms. | Niansong Zhang, Xiang Chen, Nachiket Kapre |
| 2020 | GECCO | DarwiNN: efficient distributed neuroevolution under communication constraints. | Gurshaant Singh Malik, Lucian Petrica, Nachiket Kapre, Michaela Blott |
| 2019 | FCCM | RapidRoute: Fast Assembly of Communication Structures for FPGA Overlays. | Leo Liu, Jay Weng, Nachiket Kapre |
| 2019 | FCCM | Enhancing Butterfly Fat Tree NoCs for FPGAs with Lightweight Flow Control. | Gurshaant Singh Malik, Nachiket Kapre |
| 2019 | FPGA | HopliteBuf: FPGA NoCs with Provably Stall-Free FIFOs. | Tushar Garg, Saud Wasly, Rodolfo Pellizzoni, Nachiket Kapre |
| 2019 | FPGA | Enhancing Butterfly Fat Tree NoCs for FPGAs with Lightweight Flow Control. | Gurshaant Singh Malik, Nachiket Kapre |
| 2019 | FPL | Timing-Aware Routing in the RapidWright Framework. | Leo Liu, Nachiket Kapre |
| 2019 | FPL | Scaling the Cascades: Interconnect-Aware FPGA Implementation of Machine Learning Problems. | Ananda Samajdar, Tushar Garg, Tushar Krishna, Nachiket Kapre |
| 2018 | FCCM | Hoplite-Q: Priority-Aware Routing in FPGA Overlay NoCs. | Siddhartha, Nachiket Kapre |
| 2018 | FCCM | LegUp-NoC: High-Level Synthesis of Loops with Indirect Addressing. | Asif Islam, Nachiket Kapre |
| 2018 | FPGA | FastTrack: Exploiting Fast FPGA Wiring for Implementing NoC Shortcuts (Abstract Only). | Nachiket Kapre, Tushar Krishna |
| 2018 | ISCA | FastTrack: Leveraging Heterogeneous FPGA Wires to Design Low-Cost High-Performance Soft NoCs. | Nachiket Kapre, Tushar Krishna |
| 2017 | DATE | eBSP: Managing NoC traffic for BSP workloads on the 16-core Adapteva Epiphany-III processor. | Siddhartha, Nachiket Kapre |
| 2017 | FCCM | On Bit-Serial NoCs for FPGAs. | Nachiket Kapre |
| 2017 | FCCM | Implementing FPGA Overlay NoCs Using the Xilinx UltraScale Memory Cascades. | Nachiket Kapre |
| 2017 | FPGA | 120-core microAptiv MIPS Overlay for the Terasic DE5-NET FPGA board. | Chethan Kumar H. B, Prashant Ravi, Gourav Modi, Nachiket Kapre |
| 2017 | FPL | Deflection-routed butterfly fat trees on FPGAs. | Nachiket Kapre |
| 2017 | FPL | Enabling partial reconfiguration and low latency routing using segmented FPGA NoCs. | Kizheppatt Vipin, Jan Gray, Nachiket Kapre |
| 2016 | CASES | CaffePresso: an optimized library for deep learning on embedded accelerator-based platforms. | Gopalakrishna Hegde, Siddhartha, Nachiappan Ramasamy, Nachiket Kapre |
| 2016 | FCCM | Evaluating Embedded FPGA Accelerators for Deep Learning Applications. | Gopalakrishna Hegde, Siddhartha, Nachiappan Ramasamy, Vamsi Buddha, Nachiket Kapre |
| 2016 | FCCM | Marathon: Statically-Scheduled Conflict-Free Routing on FPGA Overlay NoCs. | Nachiket Kapre |
| 2016 | FCCM | Communication Optimization for the 16-Core Epiphany Floating-Point Processor Array. | Nachiket Kapre, Siddhartha |
| 2016 | FCCM | Improving Classification Accuracy of a Machine Learning Approach for FPGA Timing Closure. | Que Yanghua, Nachiket Kapre, Harnhua Ng, Kirvy Teo |
| 2016 | FPGA | GPU-Accelerated High-Level Synthesis for Bitwidth Optimization of FPGA Datapaths. | Nachiket Kapre, Deheng Ye |
| 2016 | FPGA | Machine-Learning driven Auto-Tuning of High-Level Synthesis for FPGAs (Abstract Only). | Li Ting, Harri Wijaya, Nachiket Kapre |
| 2016 | FPGA | Case for Design-Specific Machine Learning in Timing Closure of FPGA Designs. | Que Yanghua, Chinnakkannu Adaikkala Raj, Harnhua Ng, Kirvy Teo, Nachiket Kapre |
| 2016 | FPL | Hoplite-DSP: Harnessing the Xilinx DSP48 multiplexers to efficiently support NoCs on FPGAs. | Kumar H. B. Chethan, Nachiket Kapre |
| 2016 | FPL | Survey of domain-specific languages for FPGA computing. | Nachiket Kapre, Samuel Bayliss |
| 2016 | FPL | Vector FPGA acceleration of 1-D DWT computations using sparse matrix skeletons. | Sidharth Maheshwari, Gourav Modi, Siddhartha, Nachiket Kapre |
| 2016 | FPL | Boosting convergence of timing closure using feature selection in a Learning-driven approach. | Que Yanghua, Harnhua Ng, Nachiket Kapre |
| 2016 | SAC | Software-specific part-of-speech tagging: an experimental study on stack overflow. | Deheng Ye, Zhenchang Xing, Jing Li, Nachiket Kapre |
| 2015 | FCCM | Energy-Efficient Acceleration of OpenCV Saliency Computation Using Soft Vector Processors. | Gopalakrishna Hegde, Nachiket Kapre |
| 2015 | FCCM | Sparse Graph Processing with Soft-Processors. | Nachiket Kapre |
| 2015 | FCCM | Driving Timing Convergence of FPGA Designs through Machine Learning and Cloud Computing. | Nachiket Kapre, Bibin Chandrashekaran, Harnhua Ng, Kirvy Teo |
| 2015 | FCCM | Zedwulf: Power-Performance Tradeoffs of a 32-Node Zynq SoC Cluster. | Pradeep Moorthy, Nachiket Kapre |
| 2015 | FPGA | InTime: A Machine Learning Approach for Efficient Selection of FPGA CAD Tool Parameters. | Nachiket Kapre, Harnhua Ng, Kirvy Teo, Jaco Naude |
| 2015 | FPGA | FPGA Acceleration of Irregular Iterative Computations using Criticality-Aware Dataflow Optimizations (Abstract Only). | Siddhartha, Nachiket Kapre |
| 2015 | FPGA | On Data Forwarding in Deeply Pipelined Soft Processors. | Hui Yan Cheah, Suhaib A. Fahmy, Nachiket Kapre |
| 2015 | FPL | Hoplite: Building austere overlay NoCs for FPGAs. | Nachiket Kapre, Jan Gray |
| 2015 | FPL | Limits of FPGA acceleration of 3D Green's Function computation for geophysical applications. | Nachiket Kapre, Jayakrishnan Selva Kumar, Parjanya Gupta, Sagar Shrishailappa Masuti, Sylvain Barbot |
| 2014 | FCCM | Breaking Sequential Dependencies in FPGA-Based Sparse LU Factorization. | Siddhartha, Nachiket Kapre |
| 2014 | FCCM | Timing Fault Detection in FPGA-Based Circuits. | Edward A. Stott, Joshua M. Levine, Peter Y. K. Cheung, Nachiket Kapre |
| 2014 | FCCM | MixFX-SCORE: Heterogeneous Fixed-Point Compilation of Dataflow Computations. | Deheng Ye, Nachiket Kapre |
| 2014 | FPL | Comparing soft and hard vector processing in FPGA-based embedded systems. | Soh Jun Jie, Nachiket Kapre |
| 2014 | FPL | Heterogeneous dataflow architectures for FPGA-based sparse LU factorization. | Siddhartha, Nachiket Kapre |
| 2014 | HiPC | Relax-Miracle: GPU parallelization of semi-analytic fourier-domain solvers for earthquake modeling. | Sagar Shrishailappa Masuti, Sylvain Barbot, Nachiket Kapre |
| 2013 | FCCM | Exploiting Input Parameter Uncertainty for Reducing Datapath Precision of SPICE Device Models. | Nachiket Kapre |
| 2013 | FCCM | Application Composition and Communication Optimization in Iterative Solvers Using FPGAs. | Abid Rafique, Nachiket Kapre, George A. Constantinides |
| 2012 | FCCM | FX-SCORE: A Framework for Fixed-Point Compilation of SPICE Device Models Using Gappa++. | Hlne Martorell, Nachiket Kapre |
| 2012 | FPL | Enhancing performance of Tall-Skinny QR factorization using FPGAs. | Abid Rafique, Nachiket Kapre, George A. Constantinides |
| 2009 | FCCM | Accelerating SPICE Model-Evaluation using FPGAs. | Nachiket Kapre, Andr DeHon |
| 2009 | FPL | Performance comparison of single-precision SPICE Model-Evaluation on FPGA, GPU, Cell, and multi-core processors. | Nachiket Kapre, Andr DeHon |
| 2007 | ARITH | Optimistic Parallelization of Floating-Point Accumulation. | Nachiket Kapre, Andr DeHon |
| 2006 | FCCM | GraphStep: A System Architecture for Sparse-Graph Algorithms. | Michael DeLorimier, Nachiket Kapre, Nikil Mehta, Dominic Rizzo, Ian Eslick, Raphael Rubin, Toms E. Uribe, Thomas F. Knight Jr., Andr DeHon |
| 2006 | FCCM | Packet Switched vs. Time Multiplexed FPGA Overlay Networks. | Nachiket Kapre, Nikil Mehta, Michael DeLorimier, Raphael Rubin, Henry Barnor, Michael J. Wilson, Michael G. Wrighton, Andr DeHon |
| 2004 | FCCM | Design Patterns for Reconfigurable Computing. | Andr DeHon, Joshua Adams, Michael DeLorimier, Nachiket Kapre, Yuki Matsuda, Helia Naeimi, Michael C. Vanier, Michael G. Wrighton |