Ram Krishnamurthy
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
23
Venues
11
Active years
2001–2019
Best venue rank
A*
Where they publish
Papers
23 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2019 | ARITH | Optimized Fused Floating-Point Many-Term Dot-Product Hardware for Machine Learning Accelerators. | Himanshu Kaul, Mark A. Anders, Sanu Mathew, Seongjong Kim, Ram Krishnamurthy |
| 2019 | FCCM | Why Compete When You Can Work Together: FPGA-ASIC Integration for Persistent RNNs. | Eriko Nurvitadhi, Dongup Kwon, Ali Jafari, Andrew Boutros, Jaewoong Sim, Phillip Tomson, Huseyin Sumbul, Gregory K. Chen, Phil C. Knag, Raghavan Kumar, Ram Krishnamurthy, Sergey Gribok, Bogdan Pasca, Martin Langhammer, Debbie Marr, Aravind Dasu |
| 2019 | FPGA | Evaluating and Enhancing Intel Stratix 10 FPGAs for Persistent Real-Time AI. | Eriko Nurvitadhi, Dongup Kwon, Ali Jafari, Andrew Boutros, Jaewoong Sim, Phillip Tomson, Huseyin Sumbul, Gregory K. Chen, Phil C. Knag, Raghavan Kumar, Ram Krishnamurthy, Debbie Marr, Sergey Gribok, Bogdan Pasca, Martin Langhammer, Aravind Dasu |
| 2018 | DATE | Ultra-low energy circuit building blocks for security technologies. | Sanu Mathew, Sudhir Satpathy, Vikram B. Suresh, Ram Krishnamurthy |
| 2017 | ISLPED | Invited paper: Ultra-low energy security circuit primitives for IoT platforms. | Sanu Mathew, Sudhir Satpathy, Vikram B. Suresh, Ram Krishnamurthy |
| 2016 | ICCD | Ultra-low energy security circuits for IoT applications. | Sudhir Satpathy, Sanu Mathew, Vikram B. Suresh, Ram Krishnamurthy |
| 2013 | ARITH | Split-Path Fused Floating Point Multiply Accumulate (FPMAC). | Suresh Srinivasan, Ketan Bhudiya, Rajaraman Ramanarayanan, P. Sahit Babu, Tiju Jacob, Sanu Mathew, Ram Krishnamurthy, Vasantha Erraguntla |
| 2012 | DAC | Near-threshold voltage (NTV) design: opportunities and challenges. | Himanshu Kaul, Mark A. Anders, Steven Hsu, Amit Agarwal, Ram Krishnamurthy, Shekhar Borkar |
| 2011 | DAC | High-performance energy-efficient encryption in the sub-45nm CMOS Era. | Ram Krishnamurthy, Sanu Mathew, Farhana Sheikh |
| 2009 | VLSID | A 4Gbps 0.57pJ/bit Process-Voltage-Temperature Variation Tolerant All-Digital True Random Number Generator in 45nm CMOS. | Suresh Srinivasan, Sanu Mathew, Vasantha Erraguntla, Ram Krishnamurthy |
| 2008 | ISCAS | A robust alternate repeater technique for high performance busses in the multi-core era. | Himanshu Kaul, Jae-sun Seo, Mark A. Anders, Dennis Sylvester, Ram Krishnamurthy |
| 2008 | VLSID | A 2.1GHz 6.5mW 64-bit Unified PopCount/BitScan Datapath Unit for 65nm High-Performance Microprocessor Execution Cores. | Rajaraman Ramanarayanan, Sanu Mathew, Vasantha Erraguntla, Ram Krishnamurthy, Shay Gueron |
| 2007 | ISLPED | A robust edge encoding technique for energy-efficient multi-cycle interconnect. | Jae-sun Seo, Dennis Sylvester, David T. Blaauw, Himanshu Kaul, Ram Krishnamurthy |
| 2005 | ARITH | An Improved Unified Scalable Radix-2 Montgomery Multiplier. | David Money Harris, Ram Krishnamurthy, Mark A. Anders, Sanu Mathew, Steven Hsu |
| 2005 | IOLTS | Self Calibrating Circuit Design for Variation Tolerant VLSI Systems. | Chris H. Kim, Steven Hsu, Ram Krishnamurthy, Shekhar Borkar, Kaushik Roy |
| 2005 | ISLPED | An 8.3GHz dual supply/threshold optimized 32b integer ALU-register file loop in 90nm CMOS. | Steven Hsu, Amit Agarwal, Kaushik Roy, Ram Krishnamurthy, Shekhar Borkar |
| 2004 | ISLPED | A CPL-based dual supply 32-bit ALU for sub 180nm CMOS technologies. | Bhaskar Chatterjee, Manoj Sachdev, Ram Krishnamurthy |
| 2004 | ISLPED | Spatial encoding circuit techniques for peak power reduction of on-chip high-performance buses. | Himanshu Kaul, Dennis Sylvester, Mark A. Anders, Ram Krishnamurthy |
| 2003 | ARITH | Tutorial: Design of Power Efficient VLSI Arithmetic: Speed and Power Trade-Offs. | Vojin G. Oklobdzija, Ram Krishnamurthy |
| 2003 | ARITH | Energy-Delay Estimation Technique for High-Performance Microprocessor VLSI Adders. | Vojin G. Oklobdzija, Bart R. Zeydel, Hoang Q. Dao, Sanu Mathew, Ram Krishnamurthy |
| 2003 | ISLPED | Effectiveness and scaling trends of leakage control techniques for sub-130nm CMOS technologies. | Bhaskar Chatterjee, Manoj Sachdev, Steven Hsu, Ram Krishnamurthy, Shekhar Borkar |
| 2002 | MICRO | Dynamic addressing memory arrays with physical locality. | Steven Hsu, Shih-Lien Lu, Shih-Chang Lai, Ram Krishnamurthy, Konrad Lai |
| 2001 | ISLPED | A low-leakage dynamic multi-ported register file in 0.13mm CMOS. | Atila Alvandpour, Ram Krishnamurthy, Krishnamurthy Soumyanath, Shekhar Borkar |