| 2022 | VLSID | Easily-Verifiable Design of Non-Scan Sequential Machines for Conformance Checking. | Habibur Rahaman, Santanu Chattopadhyay, Indranil Sengupta, Debesh K. Das, Bhargab B. Bhattacharya |
| 2020 | DATE | A Particle Swarm Optimization Guided Approximate Key Search Attack on Logic Locking in The Absence of Scan Access. | Rajit Karmakar, Santanu Chattopadhyay |
| 2020 | ITC | Hardware IP Protection Using Logic Encryption and Watermarking. | Rajit Karmakar, Santanu Chattopadhyay |
| 2019 | CIT | Fault Coverage Enhancement via Weighted Random Pattern Generation in BIST Using a DNN-Driven-PSO Approach. | Hillol Maity, Kaushik Khatua, Santanu Chattopadhyay, Indranil Sengupta, Girish Patankar, Parthajit Bhattacharya |
| 2019 | DAC | A Cellular Automata Guided Obfuscation Strategy For Finite-State-Machine Synthesis. | Rajit Karmakar, Suman Sekhar Jana, Santanu Chattopadhyay |
| 2019 | ISCAS | Improving Security of Logic Encryption in Presence of Design-for-Testability Infrastructure. | Rajit Karmakar, Santanu Chattopadhyay, Mrityunjoy Chakraborty |
| 2019 | Tencon | Enhanced Schedulability via Minimal Routing with Mapping and Priority Assignment for Real-Time Network-on-chip. | Ajay Khare, Irene Anna Boben, Santanu Chattopadhyay |
| 2019 | Tencon | A Deep Neural Network Augmented Approach for Fixed Polarity AND-XOR Network Synthesis. | Kaushik Khatua, Hillol Maity, Santanu Chattopadhyay, Indranil Sengupta, Girish Patankar, Parthajit Bhattacharya |
| 2018 | ISCAS | On Finding Suitable Key-Gate Locations In Logic Encryption. | Rajit Karmakar, Harshit Kumar, Santanu Chattopadhyay |
| 2017 | ISCAS | Runtime mitigation of illegal packet request attacks in Networks-on-Chip. | N. Prasad, Rajit Karmakar, Santanu Chattopadhyay, Indrajit Chakrabarti |
| 2017 | VLSID | A New Logic Encryption Strategy Ensuring Key Interdependency. | Rajit Karmakar, N. Prasad, Santanu Chattopadhyay, Rohit Kapur, Indranil Sengupta |
| 2016 | VLSID | Thermal-Safe Schedule Generation for System-on-Chip Testing. | Rajit Karmakar, Santanu Chattopadhyay |
| 2016 | VTS | Optimization of the IEEE 1687 access network for hybrid access schedules. | Srinivasa Shashank Nuthakki, Rajit Karmakar, Santanu Chattopadhyay, Krishnendu Chakrabarty |
| 2015 | ISCAS | Fault tolerant mesh based Network-on-Chip architecture. | Navonil Chatterjee, Santanu Chattopadhyay |
| 2015 | ISCAS | A hardware based low temperature solution for VLSI testing using decompressor side masking. | Arpita Dutta, Subhadip Kundu, Santanu Chattopadhyay, Bijit Kumar Das |
| 2015 | ISCAS | Test set customization for improved fault diagnosis without sacrificing coverage. | Srinivasa Shashank Nuthakki, Santanu Chattopadhyay, Mrityunjoy Chakraborty |
| 2015 | VLSID | Thermal-Aware Test Data Compression Using Dictionary Based Coding. | Rajit Karmakar, Santanu Chattopadhyay |
| 2015 | VTS | Testing of 3D-stacked ICs with hard- and soft-dies - a Particle Swarm Optimization based approach. | Rajit Karmakar, Aditya Agarwal, Santanu Chattopadhyay |
| 2014 | ISCAS | A spare router based reliable Network-on-Chip design. | Navonil Chatterjee, Santanu Chattopadhyay, Kanchan Manna |
| 2014 | VLSID | Tutorial T7A: Techniques for Network-on-Chip (NoC) Design and Test. | Santanu Chattopadhyay |
| 2013 | DAC | An ATE assisted DFD technique for volume diagnosis of scan chains. | Subhadip Kundu, Santanu Chattopadhyay, Indranil Sengupta, Rohit Kapur |
| 2013 | ETS | Aggresive scan chain masking for improved diagnosis of multiple scan chain failures. | Subhadip Kundu, Santanu Chattopadhyay, Indranil Sengupta, Rohit Kapur |
| 2012 | VLSID | A Diagnosability Metric for Test Set Selection Targeting Better Fault Detection. | Subhadip Kundu, Santanu Chattopadhyay, Indranil Sengupta, Rohit Kapur |
| 2011 | VLSID | Multiple Fault Diagnosis Based on Multiple Fault Simulation Using Particle Swarm Optimization. | Subhadip Kundu, Santanu Chattopadhyay, Indranil Sengupta, Rohit Kapur |
| 2010 | ISLPED | Customizing pattern set for test power reduction via improved X-identification and reordering. | S. Krishna Kumar, S. Kaundinya, Subhadip Kundu, Santanu Chattopadhyay |
| 2009 | VLSID | Synthesis & Testing for Low Power. | Ajit Pal, Santanu Chattopadhyay |
| 2008 | ISCAS | An efficient greedy approach to PLA folding. | Mayur Bubna, Naresh Shenoy, Santanu Chattopadhyay |
| 2008 | ISCAS | Don't care filling for power minimization in VLSI circuit testing. | Tapas K. Maiti, Santanu Chattopadhyay |
| 2008 | ISCAS | An efficient finite precision realization of the block adaptive decision feedback equalizer. | Rafiahamed Shaik, Mrityunjoy Chakraborty, Santanu Chattopadhyay |
| 2007 | ISCAS | Reducing Test-bus Power Consumption in Huffman Coding Based Test Data Compression for SOCs. | Chandan Giri, Santanu Chattopadhyay |
| 2005 | VLSID | A Combinational Logic Mapper for Actel's SX/AX Family. | Santanu Chattopadhyay, Manas Kumar Dewangan |
| 2004 | ASPDAC | Model checking on state transition diagram. | Batsayan Das, Dipankar Sarkar, Santanu Chattopadhyay |
| 2004 | VLSID | Low Power Combinational Circuit Synthesis targeting Multiplexer based FPGAs. | D. Satyanarayana, Santanu Chattopadhyay, Jakki Sasidhar |
| 2003 | VLSID | Genetic Algorithm based Approach for Low Power Combinational Circuit Testing. | Santanu Chattopadhyay, Naveen Choudhary |
| 2003 | VLSID | Genetic Algorithm based Test Scheduling and Test Access Mechanism Design for System-on-Chips. | Santanu Chattopadhyay, K. Sudarsana Reddy |
| 2003 | VLSID | Low Power Technology Mapping for LUT based FPGA "A Genetic Algorithm Approach". | Rohit Pandey, Santanu Chattopadhyay |
| 2001 | VLSID | A Novel Strategy to Test Core Based Designs. | Debabrata Bagchi, Dipanwita Roy Chowdhury, Joy Mukherjee, Santanu Chattopadhyay |
| 2000 | VLSID | An ASIC for Cellular Automata Based Message Authentication. | Prabir Dasgupta, Santanu Chattopadhyay, Indranil Sengupta |
| 2000 | VLSID | Cellular Automata Based Deterministic Test Sequence Generator for Sequential Circuits. | Prabir Dasgupta, Santanu Chattopadhyay, Indranil Sengupta |
| 1998 | VLSID | Genetic Algorithm Based Approach for Integrated State Assignment and Flipflop Selection in Finite State Machine Synthesis. | Santanu Chattopadhyay, Parimal Pal Chaudhuri |
| 1998 | VLSID | Efficient Signatures with Linear Space Complexity for Detecting Boolean Function Equivalence. | Santanu Chattopadhyay, Parimal Pal Chaudhuri |
| 1997 | VLSID | Parallel Decoder for Cellular Automata Based Byte Error Correcting Code. | Santanu Chattopadhyay, Parimal Pal Chaudhuri |
| 1996 | VLSID | Cellular automata based architecture of a database query processor. | Santanu Chattopadhyay, S. Mitra, Parimal Pal Chaudhuri |
| 1996 | VLSID | Programmable cellular automata based testbed for fault diagnosis in VLSI circuits. | Sukumar Nandi, Santanu Chattopadhyay, Parimal Pal Chaudhuri |
| 1995 | VLSID | Board level fault diagnosis using cellular automata array. | Santanu Chattopadhyay, Dipanwita Roy Chowdhury, Subarna Bhattacharjee, Parimal Pal Chaudhuri |
| 1995 | VLSID | Technology mapping on a multi-output logic module built around Cellular Automata Array for a new FPGA architecture. | Santanu Chattopadhyay, Samir Roy, Parimal Pal Chaudhuri |