| 2025 | DAC | Real-Time Dynamic IR-drop Prediction for IR ECO. | Yu-Che Lee, Yu-Hsuan Chen, Yu-Chen Cheng, Yong-Fong Chang, Jia-Wei Lin, Hsun-Wei Pao, Yung-Chih Chen, Yi-Ting Li, Wuqian Tang, Shih-Chieh Chang, Chun-Yao Wang |
| 2025 | DATE | Dynamic IR-Drop Prediction Through a Multi-Task U-Net with Package Effect Consideration. | Yu-Hsuan Chen, Yu-Chen Cheng, Yong-Fong Chang, Yu-Che Lee, Jia-Wei Lin, Hsun-Wei Pao, Peng-Wen Chen, Po-Yu Chen, Hao-Yun Chen, Yung-Chih Chen, Chun-Yao Wang, Shih-Chieh Chang |
| 2025 | VISIGRAPP | Coloring 3D Avatars with Single-Image. | Pin-Yuan Yang, Yu-Shan Deng, Chieh-Shan Lin, An-Chun Luo, Shih-Chieh Chang |
| 2024 | DATE | A Hybrid Approach to Reverse Engineering on Combinational Circuits. | Wuqian Tang, Yi-Ting Li, Kai-Po Hsu, Kuan-Ling Chou, You-Cheng Lin, Chia-Feng Chien, Tzu-Li Hsu, Yung-Chih Chen, Ting-Chi Wang, Shih-Chieh Chang, TingTing Hwang, Chun-Yao Wang |
| 2024 | ISCAS | CIMR-V: An End-to-End SRAM-based CIM Accelerator with RISC-V for AI Edge Device. | Yan-Cheng Guo, Tian-Sheuan Chang, Chih-Sheng Lin, Bo-Cheng Chiou, Chih-Ming Lai, Shyh-Shyuan Sheu, Wei-Chung Lo, Shih-Chieh Chang |
| 2022 | DATE | Robust Binary Neural Network against Noisy Analog Computation. | Zong-Han Lee, Fu-Cheng Tsai, Shih-Chieh Chang |
| 2020 | ACIVS | Person Identification by Walking Gesture Using Skeleton Sequences. | Chu-Chien Wei, Li-Huang Tsai, Hsin-Ping Chou, Shih-Chieh Chang |
| 2020 | DATE | Accuracy Tolerant Neural Networks Under Aggressive Power Optimization. | Xiang-Xiu Wu, Yi-Wen Hung, Yung-Chih Chen, Shih-Chieh Chang |
| 2020 | ECCV | Remix: Rebalanced Mixup. | Hsin-Ping Chou, Shih-Chieh Chang, Jia-Yu Pan, Wei Wei, Da-Cheng Juan |
| 2020 | EMNLP | AirConcierge: Generating Task-Oriented Dialogue via Efficient Large-Scale Knowledge Retrieval. | Chieh-Yang Chen, Pei-Hsin Wang, Shih-Chieh Chang, Da-Cheng Juan, Wei Wei, Jia-Yu Pan |
| 2019 | ASPDAC | Aging-aware chip health prediction adopting an innovative monitoring strategy. | Yun-Ting Wang, Kai-Chiang Wu, Chung-Han Chou, Shih-Chieh Chang |
| 2019 | ICCV | Improving Adversarial Robustness via Guided Complement Entropy. | Hao-Yun Chen, Jhao-Hong Liang, Shih-Chieh Chang, Jia-Yu Pan, Yu-Ting Chen, Wei Wei, Da-Cheng Juan |
| 2019 | ICLR | Complement Objective Training. | Hao-Yun Chen, Pei-Hsin Wang, Chun-Hao Liu, Shih-Chieh Chang, Jia-Yu Pan, Yu-Ting Chen, Wei Wei, Da-Cheng Juan |
| 2019 | PAKDD | Hierarchical LSTM: Modeling Temporal Dynamics and Taxonomy in Location-Based Mobile Check-Ins. | Chun-Hao Liu, Da-Cheng Juan, Xuan-An Tseng, Wei Wei, Yu-Ting Chen, Jia-Yu Pan, Shih-Chieh Chang |
| 2018 | ICCAD | Searching toward pareto-optimal device-aware neural architectures. | An-Chieh Cheng, Jin-Dong Dong, Chi-Hung Hsu, Shu-Huan Chang, Min Sun, Shih-Chieh Chang, Jia-Yu Pan, Yu-Ting Chen, Wei Wei, Da-Cheng Juan |
| 2017 | ASPDAC | Pattern based runtime voltage emergency prediction: An instruction-aware block sparse compressed sensing approach. | Yu-Guang Chen, Michihiro Shintani, Takashi Sato, Yiyu Shi, Shih-Chieh Chang |
| 2017 | ASPDAC | CN-SIM: A cycle-accurate full system power delivery noise simulator. | Kassan Unda, Chung-Han Chou, Shih-Chieh Chang, Cheng Zhuo, Yiyu Shi |
| 2017 | ICCD | A Dynamic Deep Neural Network Design for Efficient Workload Allocation in Edge Computing. | Chi Lo, Yu-Yi Su, Chun-Yi Lee, Shih-Chieh Chang |
| 2016 | ASPDAC | A novel low-cost dynamic logic reconfigurable structure strategy for low power optimization. | Yu-Guang Chen, Wan-Yu Wen, Yun-Ting Wang, You-Luen Lee, Shih-Chieh Chang |
| 2015 | ASPDAC | Hybrid coverage assertions for efficient coverage analysis across simulation and emulation environments. | Hsuan-Ming Chou, Hong-Chang Wu, Yi-Chiao Chen, Jean Tsao, Shih-Chieh Chang |
| 2014 | DAC | Critical Path Monitor Enabled Dynamic Voltage Scaling for Graceful Degradation in Sub-Threshold Designs. | Yu-Guang Chen, Tao Wang, Kuan-Yu Lai, Wan-Yu Wen, Yiyu Shi, Shih-Chieh Chang |
| 2014 | DAC | Contactless Stacked-die Testing for Pre-bond Interposers. | Jui-Hung Chien, Ruei-Siang Hsu, Hsueh-Ju Lin, Ka-Yi Yeh, Shih-Chieh Chang |
| 2014 | DATE | Yield and timing constrained spare TSV assignment for three-dimensional integrated circuits. | Yu-Guang Chen, Kuan-Yu Lai, Ming-Chao Lee, Yiyu Shi, Wing-Kai Hon, Shih-Chieh Chang |
| 2014 | DATE | Package geometric aware thermal analysis by infrared-radiation thermal images. | Jui-Hung Chien, Hao Yu, Ruei-Siang Hsu, Hsueh-Ju Lin, Shih-Chieh Chang |
| 2013 | DAC | A novel fuzzy matching model for lithography hotspot detection. | Sheng-Yuan Lin, Jing-Yi Chen, Jin-Cheng Li, Wan-Yu Wen, Shih-Chieh Chang |
| 2013 | ICCAD | Low-power timing closure methodology for ultra-low voltage designs. | Wen-Pin Tu, Chung-Han Chou, Shih-Hsu Huang, Shih-Chieh Chang, Yow-Tyng Nieh, Chien-Yung Chou |
| 2012 | ASPDAC | Post silicon skew tuning: Survey and analysis. | Mac Y. C. Kao, Kun-Ting Tsai, Hsuan-Ming Chou, Shih-Chieh Chang |
| 2012 | DATE | A probabilistic analysis method for functional qualification under Mutation Analysis. | Hsiu-Yi Lin, Chun-Yao Wang, Shih-Chieh Chang, Yung-Chih Chen, Hsuan-Ming Chou, Ching-Yi Huang, Yen-Chi Yang, Chun-Chien Shen |
| 2012 | DATE | Mitigating lifetime underestimation: A system-level approach considering temperature variations and correlations between failure mechanisms. | Kai-Chiang Wu, Ming-Chao Lee, Diana Marculescu, Shih-Chieh Chang |
| 2012 | ICCAD | Efficient multiple-bit retention register assignment for power gated design: Concept and algorithms. | Yu-Guang Chen, Yiyu Shi, Kuan-Yu Lai, Hui Geng, Shih-Chieh Chang |
| 2012 | INFOCOM | Memory-efficient pattern matching architectures using perfect hashing on graphic processing units. | Cheng-Hung Lin, Chen-Hsiung Liu, Shih-Chieh Chang, Wing-Kai Hon |
| 2011 | ASPDAC | NBTI-aware power gating design. | Ming-Chao Lee, Yu-Guang Chen, Ding-Kei Huang, Shih-Chieh Chang |
| 2011 | DAC | Fault-tolerant 3D clock network. | Chiao-Ling Lung, Yu-Shih Su, Shih-Hsiu Huang, Yiyu Shi, Shih-Chieh Chang |
| 2011 | DATE | Thermal-aware on-line task allocation for 3D multi-core processor throughput optimization. | Chiao-Ling Lung, Yi-Lun Ho, Ding-Ming Kwai, Shih-Chieh Chang |
| 2011 | GLOBECOM | Accelerating Regular Expression Matching Using Hierarchical Parallel Machines on GPU. | Cheng-Hung Lin, Chen-Hsiung Liu, Shih-Chieh Chang |
| 2011 | ICCAD | On the preconditioner of conjugate gradient method - A power grid simulation perspective. | Chung-Han Chou, Nien-Yu Tsai, Hao Yu, Che-Rung Lee, Yiyu Shi, Shih-Chieh Chang |
| 2011 | ICCAD | Useful-skew clock optimization for multi-power mode designs. | Hsuan-Ming Chou, Hao Yu, Shih-Chieh Chang |
| 2011 | ICCAD | A robust architecture for post-silicon skew tuning. | Mac Y. C. Kao, Kun-Ting Tsai, Shih-Chieh Chang |
| 2011 | ISLPED | Analysis and mitigation of NBTI-induced performance degradation for power-gated circuits. | Kai-Chiang Wu, Diana Marculescu, Ming-Chao Lee, Shih-Chieh Chang |
| 2010 | DAC | An efficient phase detector connection structure for the skew synchronization system. | Yu-Chien Kao, Hsuan-Ming Chou, Kun-Ting Tsai, Shih-Chieh Chang |
| 2010 | DATE | Clock skew optimization considering complicated power modes. | Chiao-Ling Lung, Zi-Yi Zeng, Chung-Han Chou, Shih-Chieh Chang |
| 2010 | GLOBECOM | Accelerating String Matching Using Multi-Threaded Algorithm on GPU. | Cheng-Hung Lin, Sheng-Yu Tsai, Chen-Hsiung Liu, Shih-Chieh Chang, Jyuo-Min Shyu |
| 2010 | ICCAD | Synthesis of an efficient controlling structure for post-silicon clock skew minimization. | Yu-Chien Kao, Hsuan-Ming Chou, Kun-Ting Tsai, Shih-Chieh Chang |
| 2009 | ICCAD | An efficient wakeup scheduling considering resource constraint for sensor-based power gating designs. | Ming-Chao Lee, Yu-Ting Chen, Yo-Tzu Cheng, Shih-Chieh Chang |
| 2009 | ICCAD | Value assignment of adjustable delay buffers for clock skew minimization in multi-voltage mode designs. | Yu-Shih Su, Wing-Kai Hon, Cheng-Chih Yang, Shih-Chieh Chang, Yeong-Jar Chang |
| 2008 | ASPDAC | Behavioral synthesis with activating unused flip-flops for reducing glitch power in FPGA. | Cheng-Tao Hsieh, Jason Cong, Zhiru Zhang, Shih-Chieh Chang |
| 2008 | ICCAD | A novel sequential circuit optimization with clock gating logic. | Yu-Min Kuo, Shih-Hung Weng, Shih-Chieh Chang |
| 2008 | ICCD | Timing analysis considering IR drop waveforms in power gating designs. | Shih-Hung Weng, Yu-Min Kuo, Shih-Chieh Chang, Malgorzata Marek-Sadowska |
| 2007 | DAC | Fine-Grained Sleep Transistor Sizing Algorithm for Leakage Power Minimization. | De-Shiuan Chiou, Da-Cheng Juan, Yu-Ting Chen, Shih-Chieh Chang |
| 2007 | DAC | An Efficient Mechanism for Performance Optimization of Variable-Latency Designs. | Yu-Shih Su, Da-Chung Wang, Shih-Chieh Chang, Malgorzata Marek-Sadowska |
| 2007 | ICCAD | An efficient wake-up schedule during power mode transition considering spurious glitches phenomenon. | Yu-Ting Chen, Da-Cheng Juan, Ming-Chao Lee, Shih-Chieh Chang |
| 2007 | ICCAD | Engineering change using spare cells with constant insertion. | Yu-Min Kuo, Ya-Ting Chang, Shih-Chieh Chang, Malgorzata Marek-Sadowska |
| 2007 | ICCAD | Analysis and optimization of power-gated ICs with multiple power gating configurations. | Aida Todri, Malgorzata Marek-Sadowska, Shih-Chieh Chang |
| 2007 | ISLPED | Electromigration and voltage drop aware power grid optimization for power gated ICs. | Aida Todri, Shih-Chieh Chang, Malgorzata Marek-Sadowska |
| 2006 | ASPDAC | Delay variation tolerance for domino circuits. | Kai-Chiang Wu, Cheng-Tao Hsieh, Shih-Chieh Chang |
| 2006 | DAC | Timing driven power gating. | De-Shiuan Chiou, Shih-Hsin Chen, Shih-Chieh Chang, Chingwei Yeh |
| 2006 | DATE | Optimization of regular expression pattern matching circuits on FPGA. | Cheng-Hung Lin, Chih-Tsun Huang, Chang-Ping Jiang, Shih-Chieh Chang |
| 2006 | ICCAD | Efficient Boolean characteristic function for fast timed ATPG. | Yu-Min Kuo, Yue-Lung Chang, Shih-Chieh Chang |
| 2005 | ASPDAC | Power estimation starategies for a low-power security processor. | Yen-Fong Lee, Shi-Yu Huang, Sheng-Yu Hsu, I-Ling Chen, Cheng-Tao Shieh, Jian-Cheng Lin, Shih-Chieh Chang |
| 2005 | ASPDAC | Design and design automation of rectification logic for engineering change. | Cheng-Hung Lin, Yung-Chang Huang, Shih-Chieh Chang, Wen-Ben Jone |
| 2005 | ASPDAC | Power minimization for dynamic PLAs. | Tzyy-Kuen Tien, Chih-Shen Tsai, Shih-Chieh Chang, Chingwei Yeh |
| 2005 | ISCAS | FPGA technology mapping optimization by rewiring algorithms. | Wai-Chung Tang, Wing-Hang Lo, Yu-Liang Wu, Shih-Chieh Chang |
| 2004 | DAC | Re-synthesis for delay variation tolerance. | Shih-Chieh Chang, Cheng-Tao Hsieh, Kai-Chiang Wu |
| 2004 | ICCAD | A vectorless estimation of maximum instantaneous current for sequential circuits. | Cheng-Tao Hsieh, Jian-Cheng Lin, Shih-Chieh Chang |
| 2002 | DATE | Crosstalk Alleviation for Dynamic PLAs. | Tzyy-Kuen Tien, Tong-Kai Tsai, Shih-Chieh Chang |
| 2002 | ISCAS | A don't-care based image circuit for function verification. | Jiann-Chyi Rau, Yan-Min Chen, Shih-Chieh Chang |
| 2000 | ICCAD | Wire Reconnections Based on Implication Flow Graph. | Shih-Chieh Chang, Zhong-Zhen Wu, He-Zhe Yu |
| 2000 | ICCAD | Synthesis of CMOS Domino Circuits for Charge Sharing Alleviation. | Ching-Hwa Cheng, Shih-Chieh Chang, Shin-De Li, Wen-Ben Jone, Jinn-Shyan Wang |
| 2000 | ISCAS | A timing-driven pseudo-exhaustive testing of VLSI circuits. | Shih-Chieh Chang, Jiann-Chyi Rau |
| 2000 | ISCAS | A compact factored form for a Boolean function. | Jiann-Chyi Rau, Yan-Min Chen, Shih-Chieh Chang |
| 1999 | DAC | Gate-Level Design Exploiting Dual Supply Voltages for Power-Driven Applications. | Ching-Wei Yeh, Min-Cheng Chang, Shih-Chieh Chang, Wen-Ben Jone |
| 1999 | ICCAD | Synthesis for multiple input wires replacement of a gate for wiring consideration. | Shih-Chieh Chang, Jung-Cheng Chuang, Zhong-Zhen Wu |
| 1999 | ISCAS | Power reduction through iterative gate sizing and voltage scaling. | Chingwei Yeh, Min-Cheng Chang, Shih-Chieh Chang, Wen-Ben Jone |
| 1998 | DAC | Efficient Boolean Division and Substitution. | Shih-Chieh Chang, David Ihsin Cheng |
| 1998 | ITC | A novel combinational testability analysis by considering signal correlation. | Shih-Chieh Chang, Shi-Sen Chang, Wen-Ben Jone, Chien-Chung Tsai |
| 1998 | ITC | A tree-structured LFSR synthesis scheme for pseudo-exhaustive testing of VLSI circuits. | Wen-Ben Jone, Jiann-Chyi Rau, Shih-Chieh Chang, Yu-Liang Wu |
| 1996 | DATE | Perturb and Simplify: Optimizing Combinational Circuits with External Don't Cares. | Shih-Chieh Chang, Malgorzata Marek-Sadowska |
| 1996 | ICCAD | Fast Boolean optimization by rewiring. | Shih-Chieh Chang, Lukas P. P. P. van Ginneken, Malgorzata Marek-Sadowska |
| 1995 | DAC | An Efficient Algorithm for Local Don't Care Sets Calculation. | Shih-Chieh Chang, Malgorzata Marek-Sadowska, Kwang-Ting Cheng |
| 1995 | DAC | Logic Synthesis for Engineering Change. | Chih-Chang Lin, Kuang-Chien Chen, Shih-Chieh Chang, Malgorzata Marek-Sadowska, Kwang-Ting Cheng |
| 1994 | DAC | Layout Driven Logic Synthesis for FPGAs. | Shih-Chieh Chang, Kwang-Ting Cheng, Nam Sung Woo, Malgorzata Marek-Sadowska |
| 1994 | ICCAD | Perturb and simplify: multi-level boolean network optimizer. | Shih-Chieh Chang, Malgorzata Marek-Sadowska |
| 1992 | ICCD | Technology Mapping via Transformations of Function Graphs. | Shih-Chieh Chang, Malgorzata Marek-Sadowska |