Wolfgang Kunz
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
72
Venues
22
Active years
1992–2026
Best venue rank
A*
Where they publish
- ADATE13 papers
- AICCAD13 papers
- A*DAC11 papers
- CFDL9 papers
- BASPDAC4 papers
- AITC3 papers
- BFMCAD2 papers
- CMEMOCODE2 papers
- CISCAS2 papers
- AAsiaCCS1 paper
- BETS1 paper
- CDSD1 paper
- CDDECS1 paper
- NationalVLSID1 paper
- NationalVTS1 paper
- Journal PublishedCASES1 paper
- CRSP1 paper
- A*CAV1 paper
- BGI1 paper
- CICCD1 paper
- BFPL1 paper
- AISLPED1 paper
Papers
72 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | DATE | Multi-Partner Project: A Holistic and Open-Source Approach to Efficient, Secure and Reliable AI Hardware Deployment in DI-EDAI. | Georgios Sotiropoulos, Felix Frombach, Julian Hfer, Tanja Harbaum, Jrgen Becker, Henrik Iver Thore, Vincent Meyers, Mehdi B. Tahoori, Zeynep Demirdag, Mohammed Bakr Sikal, Hassan Nassar, Heba Khdr, Jrg Henkel, Christopher Wolters, Philipp van Kempen, Johannes Geier, Ulf Schlichtmann, Batuhan Sesli, Muhammad Sabih, Jakob Wittmann, Frank Hannig, Jrgen Teich, Lukas Steiner, Norbert Wehn, Mohamed Shelkamy Ali, Philipp Schmitz, Wolfgang Kunz, Stefan Koegler, Georg Sigl |
| 2025 | AsiaCCS | Okapi: Efficiently Safeguarding Speculative Data Accesses in Sandboxed Environments. | Philipp Schmitz, Tobias Jauch, Alex Wezel, Mohammad Rahmani Fadiheh, Thore Tiemann, Jonah Heller, Thomas Eisenbarth, Dominik Stoffel, Wolfgang Kunz |
| 2025 | DAC | FastPath: A Hybrid Approach for Efficient Hardware Security Verification. | Lucas Deutschmann, Andres Meza, Dominik Stoffel, Wolfgang Kunz, Ryan Kastner |
| 2025 | DATE | Multi-Partner Project: Open-Source Design Tools for Co-Development of AI Algorithms and AI Chips: (Initial Stage). | Mehdi B. Tahoori, Jrgen Becker, Jrg Henkel, Wolfgang Kunz, Ulf Schlichtmann, Georg Sigl, Jrgen Teich, Norbert Wehn |
| 2025 | ETS | Security Risks in AI Accelerators: Detecting RTL Vulnerabilities to Model Theft with Formal Verification. | Mohamed Shelkamy Ali, Lucas Deutschmann, Johannes Mller, Anna Lena Duque Antn, Mohammad Rahmani Fadiheh, Dominik Stoffel, Wolfgang Kunz |
| 2024 | DAC | MCU-Wide Timing Side Channels and Their Detection. | Johannes Mller, Anna Lena Duque Antn, Lucas Deutschmann, Dino Mehmedagic, Cristiano Rodrigues, Daniel Oliveira, Mohammad Rahmani Fadiheh, Keerthikumara Devarajegowda, Sandro Pinto, Dominik Stoffel, Wolfgang Kunz |
| 2024 | DATE | A Golden-Free Formal Method for Trojan Detection in Non-Interfering Accelerators. | Anna Lena Duque Antn, Johannes Mller, Lucas Deutschmann, Mohammad Rahmani Fadiheh, Dominik Stoffel, Wolfgang Kunz |
| 2024 | ICCAD | VeriCHERI: Exhaustive Formal Security Verification of CHERI at the RTL. | Anna Lena Duque Antn, Johannes Mller, Philipp Schmitz, Tobias Jauch, Alex Wezel, Lucas Deutschmann, Mohammad Rahmani Fadiheh, Dominik Stoffel, Wolfgang Kunz |
| 2023 | ICCAD | Secure-by-Construction Design Methodology for CPUs: Implementing Secure Speculation on the RTL. | Tobias Jauch, Alex Wezel, Mohammad Rahmani Fadiheh, Philipp Schmitz, Sayak Ray, Jason M. Fung, Christopher W. Fletcher, Dominik Stoffel, Wolfgang Kunz |
| 2022 | DAC | Towards a formally verified hardware root-of-trust for data-oblivious computing. | Lucas Deutschmann, Johannes Mller, Mohammad Rahmani Fadiheh, Dominik Stoffel, Wolfgang Kunz |
| 2022 | DATE | The Scale4Edge RISC-V Ecosystem. | Wolfgang Ecker, Peer Adelt, Wolfgang Mller, Reinhold Heckmann, Milos Krstic, Vladimir Herdt, Rolf Drechsler, Gerhard Angst, Ralf Wimmer, Andreas Mauderer, Rafael Stahl, Karsten Emrich, Daniel Mueller-Gritschneder, Bernd Becker, Philipp Scholl, Eyck Jentzsch, Jan Schlamelcher, Kim Grttner, Paul Palomero Bernardo, Oliver Bringmann, Mihaela Damian, Julian Oppermann, Andreas Koch, Jrg Bormann, Johannes Partzsch, Christian Mayr, Wolfgang Kunz |
| 2021 | DAC | A Formal Approach to Confidentiality Verification in SoCs at the Register Transfer Level. | Johannes Mller, Mohammad Rahmani Fadiheh, Anna Lena Duque Antn, Thomas Eisenbarth, Dominik Stoffel, Wolfgang Kunz |
| 2021 | DATE | Nano Security: From Nano-Electronics to Secure Systems. | Ilia Polian, Frank Altmann, Tolga Arul, Christian Boit, Ralf Brederlow, Lucas Davi, Rolf Drechsler, Nan Du, Thomas Eisenbarth, Tim Gneysu, Sascha Hermann, Matthias Hiller, Rainer Leupers, Farhad Merchant, Thomas Mussenbrock, Stefan Katzenbeisser, Akash Kumar, Wolfgang Kunz, Thomas Mikolajick, Vivek Pachauri, Jean-Pierre Seifert, Frank Sill Torres, Jens Trommer |
| 2021 | ITC | Compositional Fault Propagation Analysis in Embedded Systems using Abstract Interpretation. | Christian Bartsch, Stephan Wilhelm, Daniel Kstner, Dominik Stoffel, Wolfgang Kunz |
| 2020 | DAC | A Formal Approach for Detecting Vulnerabilities to Transient Execution Attacks in Out-of-Order Processors. | Mohammad Rahmani Fadiheh, Johannes Mller, Raik Brinkmann, Subhasish Mitra, Dominik Stoffel, Wolfgang Kunz |
| 2020 | DATE | Gap-free Processor Verification by S | Keerthikumara Devarajegowda, Mohammad Rahmani Fadiheh, Eshan Singh, Clark W. Barrett, Subhasish Mitra, Wolfgang Ecker, Dominik Stoffel, Wolfgang Kunz |
| 2020 | DSD | Automatic State Space Analysis for Modeling Untrusted Embedded Device Drivers. | Thomas Fehmel, Viet-Tan Nguyen, Dominik Stoffel, Wolfgang Kunz |
| 2019 | DAC | ACCESS: HW/SW Co-Equivalence Checking for Firmware Optimization. | Michael Schwarz, Raphael Stahl, Daniel Mller-Gritschneder, Ulf Schlichtmann, Dominik Stoffel, Wolfgang Kunz |
| 2019 | DATE | Processor Hardware Security Vulnerabilities and their Detection by Unique Program Execution Checking. | Mohammad Rahmani Fadiheh, Dominik Stoffel, Clark W. Barrett, Subhasish Mitra, Wolfgang Kunz |
| 2019 | DATE | Symbolic QED Pre-silicon Verification for Automotive Microcontroller Cores: Industrial Case Study. | Eshan Singh, Keerthikumara Devarajegowda, Sebastian Simon, Ralf Schnieder, Karthik Ganesan, Mohammad Rahmani Fadiheh, Dominik Stoffel, Wolfgang Kunz, Clark W. Barrett, Wolfgang Ecker, Subhasish Mitra |
| 2019 | FDL | Systematic RISC-V based Firmware Design | Vladimir Herdt, Daniel Groe, Rolf Drechsler, Christoph Gerum, Alexander Louis-Ferdinand Jung, Joscha Benz, Oliver Bringmann, Michael Schwarz, Dominik Stoffel, Wolfgang Kunz |
| 2018 | DATE | Symbolic quick error detection using symbolic initial state for pre-silicon verification. | Mohammad Rahmani Fadiheh, Joakim Urdahl, Srinivasa Shashank Nuthakki, Subhasish Mitra, Clark W. Barrett, Dominik Stoffel, Wolfgang Kunz |
| 2017 | DDECS | Cycle-accurate software modeling for RTL verification of embedded systems. | Michael Schwarz, Carlos Villarraga, Dominik Stoffel, Wolfgang Kunz |
| 2017 | FMCAD | goSAT: Floating-point satisfiability as global optimization. | M. Ammar Ben Khadra, Dominik Stoffel, Wolfgang Kunz |
| 2017 | VLSID | Dynamic Power Optimization Based on Formal Property Checking of Operations. | Shrinidhi Udupi, Joakim Urdahl, Dominik Stoffel, Wolfgang Kunz |
| 2017 | VTS | Special session on early life failures. | Jyotirmoy V. Deshmukh, Wolfgang Kunz, Hans-Joachim Wunderlich, Sybille Hellebrand |
| 2016 | CASES | Speculative disassembly of binary code. | M. Ammar Ben Khadra, Dominik Stoffel, Wolfgang Kunz |
| 2016 | ICCAD | Properties first? a new design methodology for hardware, and its perspectives in safety analysis. | Joakim Urdahl, Shrinidhi Udupi, Tobias Ludwig, Dominik Stoffel, Wolfgang Kunz |
| 2016 | MEMOCODE | A computer-algebraic approach to formal verification of data-centric low-level software. | Oliver Marx, Carlos Villarraga, Dominik Stoffel, Wolfgang Kunz |
| 2015 | FDL | Architectural system modeling for correct-by-construction RTL design. | Joakim Urdahl, Dominik Stoffel, Wolfgang Kunz |
| 2014 | FDL | A property language for the specification of hardware-dependent embedded system software. | Binghao Bao, Carlos Villarraga, Bernard Schmidt, Dominik Stoffel, Wolfgang Kunz |
| 2014 | ITC | Software in a hardware view: New models for HW-dependent software in SoC verification and test. | Carlos Villarraga, Bernard Schmidt, Binghao Bao, Rakesh Raman, Christian Bartsch, Thomas Fehmel, Dominik Stoffel, Wolfgang Kunz |
| 2013 | ASPDAC | A computational model for SAT-based verification of hardware-dependent low-level embedded system software. | Bernard Schmidt, Carlos Villarraga, Jrg Bormann, Dominik Stoffel, Markus Wedler, Wolfgang Kunz |
| 2013 | ICCAD | Proof logging for computer algebra based SMT solving. | Oliver Marx, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Alexander Dreyer |
| 2013 | MEMOCODE | An equivalence checker for hardware-dependent embedded system software. | Carlos Villarraga, Bernard Schmidt, Jrg Bormann, Christian Bartsch, Dominik Stoffel, Wolfgang Kunz |
| 2012 | DAC | System verification of concurrent RTL modules by compositional path predicate abstraction. | Joakim Urdahl, Dominik Stoffel, Markus Wedler, Wolfgang Kunz |
| 2012 | FDL | Formal plausibility checks for environment constraints. | Binghao Bao, Jrg Bormann, Markus Wedler, Dominik Stoffel, Wolfgang Kunz |
| 2012 | FDL | Formal Plausibility Checks for Environment Constraints. | Binghao Bao, Jrg Bormann, Markus Wedler, Dominik Stoffel, Wolfgang Kunz |
| 2011 | DAC | Formal hardware/software co-verification by interval property checking with abstraction. | Minh D. Nguyen, Markus Wedler, Dominik Stoffel, Wolfgang Kunz |
| 2011 | DATE | STABLE: A new QF-BV SMT solver for hard verification problems combining Boolean reasoning with computer algebra. | Evgeny Pavlenko, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Alexander Dreyer, Frank Seelisch, Gert-Martin Greuel |
| 2011 | RSP | Validation of channel decoding ASIPs a case study. | Christian Brehm, Norbert Wehn, Sacha Loitz, Wolfgang Kunz |
| 2010 | DAC | Analyzing | Max Thalmaier, Minh D. Nguyen, Markus Wedler, Dominik Stoffel, Jrg Bormann, Wolfgang Kunz |
| 2010 | FDL | Complete Verification of Weakly Programmable IPs against Their Operational ISA Model. | Sacha Loitz, Markus Wedler, Dominik Stoffel, Christian Brehm, Norbert Wehn, Wolfgang Kunz |
| 2010 | FMCAD | Path predicate abstraction by complete interval property checking. | Joakim Urdahl, Dominik Stoffel, Jrg Bormann, Markus Wedler, Wolfgang Kunz |
| 2009 | FDL | A re-use methodology for formal SoC protocol compliance verification. | Minh D. Nguyen, Max Thalmaier, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Jrg Bormann |
| 2008 | ASPDAC | Verifying full-custom multipliers by Boolean equivalence checking and an arithmetic bit level proof. | Udo Krautz, Markus Wedler, Wolfgang Kunz, Kai Weber, Christian Jacobi, Matthias Pflanz |
| 2008 | CAV | An Algebraic Approach for Proving Data Correctness in Arithmetic Data Paths. | Oliver Wienand, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Gert-Martin Greuel |
| 2008 | FDL | Modeling of Custom-Designed Arithmetic Components for ABL Normalization. | Evgeny Pavlenko, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Oliver Wienand, Evgeny Karibaev |
| 2008 | FDL | A New Verification Technique for Custom-Designed Components at the Arithmetic Bit Level. | Evgeny Pavlenko, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Oliver Wienand, Evgeny Karibaev |
| 2005 | DAC | Normalization at the arithmetic bit level. | Markus Wedler, Dominik Stoffel, Wolfgang Kunz |
| 2005 | GI | Enhancing BMC-based Protocol Verification Using Transition-By-Transition FSM Traversal. | Minh D. Nguyen, Dominik Stoffel, Wolfgang Kunz |
| 2005 | ICCAD | Transition-by-transition FSM traversal for reachability analysis in bounded model checking. | Minh D. Nguyen, Dominik Stoffel, Markus Wedler, Wolfgang Kunz |
| 2004 | ASPDAC | Exploiting state encoding for invariant generation in induction-based property checking. | Markus Wedler, Dominik Stoffel, Wolfgang Kunz |
| 2004 | DATE | Arithmetic Reasoning in DPLL-Based SAT Solving. | Markus Wedler, Dominik Stoffel, Wolfgang Kunz |
| 2004 | ICCD | Layout Driven Optimization of Datapath Circuits using Arithmetic Reasoning. | Ingmar Neumann, Dominik Stoffel, Kolja Sulimma, Michel R. C. M. Berkelaar, Wolfgang Kunz |
| 2003 | DATE | Using RTL Statespace Information and State Encoding for Induction Based Property Checking. | Markus Wedler, Dominik Stoffel, Wolfgang Kunz |
| 2002 | DATE | Improving Placement under the Constant Delay Model. | Kolja Sulimma, Wolfgang Kunz, Ingmar Neumann, Lukas P. P. P. van Ginneken |
| 2002 | ICCAD | SAT and ATPG: Boolean engines for formal hardware verification. | Armin Biere, Wolfgang Kunz |
| 2001 | ICCAD | Placement Driven Retiming with a Coupled Edge Timing Model. | Ingmar Neumann, Wolfgang Kunz |
| 2001 | ICCAD | Verification of Integer Multipliers on the Arithmetic Bit Level. | Dominik Stoffel, Wolfgang Kunz |
| 2001 | ISCAS | Cycle time optimization by timing driven placement with simultaneous netlist transformations. | Hendrik Hartje, Ingmar Neumann, Dominik Stoffel, Wolfgang Kunz |
| 2001 | ISCAS | Tight coupling of timing-driven placement and retiming. | Ingmar Neumann, Wolfgang Kunz |
| 1999 | FPL | Accelerating Boolean Implications with FPGAs. | Kolja Sulimma, Dominik Stoffel, Wolfgang Kunz |
| 1999 | ICCAD | Cell replication and redundancy elimination during placement for cycle time optimization. | Ingmar Neumann, Dominik Stoffel, Hendrik Hartje, Wolfgang Kunz |
| 1997 | ASPDAC | AND/OR reasoning graphs for determining prime implicants in multi-level combinational networks. | Dominik Stoffel, Wolfgang Kunz, Stefan Gerber |
| 1997 | ICCAD | Record & play: a structural fixed point iteration for sequential circuit verification. | Dominik Stoffel, Wolfgang Kunz |
| 1996 | ISLPED | Gate-level synthesis for low-power using new transformations. | Dhiraj K. Pradhan, Mitrajit Chatterjee, Madhu V. Swarna, Wolfgang Kunz |
| 1995 | DAC | Novel Verification Framework Combining Structural and OBDD Methods in a Synthesis Environment. | Subodh M. Reddy, Wolfgang Kunz, Dhiraj K. Pradhan |
| 1995 | ICCAD | LOT: logic optimization with testability-new transformations using recursive learning. | Mitrajit Chatterjee, Dhiraj K. Pradhan, Wolfgang Kunz |
| 1994 | ICCAD | Multi-level logic optimization by implication analysis. | Wolfgang Kunz, Prem R. Menon |
| 1993 | ICCAD | HANNIBAL: an efficient tool for logic verification based on recursive learning. | Wolfgang Kunz |
| 1992 | ITC | Recursive Learning: An Attractive Alternative to the Decision Tree for Test Genration in Digital Circuits. | Wolfgang Kunz, Dhiraj K. Pradhan |