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Asia and South Pacific Design Automation Conference

ASPDAC

B

CORE rank

CORE rank (raw)

B

Fields of research

Distributed Computing and Systems Software

Papers indexed

4,548

1995–2026

Papers per year

1995301 peak2026

ASPDAC papers

4,548 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2010A fast heuristic scheduling algorithm for periodic ConcurrenC models.Weiwei Chen, Rainer Dmer
2010Automatic assertion extraction via sequential data mining of simulation traces.Po-Hsien Chang, Li-C. Wang
2010Room-temperature fuel cells and their integration into portable and embedded systems.Naehyuck Chang, Jueun Seo, Donghwa Shin, Younghyun Kim
2010A probabilistic Boolean logic for energy efficient circuit and system design.Lakshmi N. Chakrapani, Krishna V. Palem
2010Incremental solution of power grids using random walks.Baktash Boghrati, Sachin S. Sapatnekar
2010Post-silicon debugging for multi-core designs.Valeria Bertacco
2010Generalised threshold gate synthesis based on AND/OR/NOT representation of Boolean function.Marek A. Bawiec, Maciej Nikodem
2010Cool and save: cooling aware dynamic workload scheduling in multi-socket CPU systems.Raid Zuhair Ayoub, Tajana Simunic Rosing
2010Buffered clock tree sizing for skew minimization under power and thermal budgets.Krit Athikulwongse, Xin Zhao, Sung Kyu Lim
2010A WiMAX turbo decoder with tailbiting BIP architecture.Hiroaki Arai, Naoto Miyamoto, Koji Kotani, Hisanori Fujisawa, Takashi Ito
2010Rule-based optimization of reversible circuits.Mona Arabzadeh, Mehdi Saeedi, Morteza Saheb Zamani
2010A novel FDTD algorithm based on alternating-direction explicit method with PML absorbing boundary condition.Shuichi Aono, Masaki Unno, Hideki Asai
2010A PUF design for secure FPGA-based embedded systems.Jason Helge Anderson
2010Guided gate-level ATPG for sequential circuits using a high-level test generation approach.Bijan Alizadeh, Masahiro Fujita
2010TLM automation for multi-core design.Samar Abdi
2009A 1 GHz CMOS comparator with dynamic offset control technique.Xiaolei Zhu, Sanroku Tsukamoto, Tadahiro Kuroda
2009Frequent value compression in packet-based NoC architectures.Ping Zhou, Bo Zhao, Yu Du, Yi Xu, Youtao Zhang, Jun Yang, Li Zhao
2009Congestion-aware power grid optimization for 3D circuits using MIM and CMOS decoupling capacitors.Pingqiang Zhou, Karthikk Sridharan, Sachin S. Sapatnekar
2009A novel Toffoli network synthesis algorithm for reversible logic.Yexin Zheng, Chao Huang
2009Energy-aware register file re-partitioning for clustered VLIW architectures.Yingchao Zhao, Chun Jason Xue, Minming Li, Bessie C. Hu
2009Noise minimization during power-up stage for a multi-domain power network.Wanping Zhang, Yi Zhu, Wenjian Yu, Amirali Shayan Arani, Renshen Wang, Zhi Zhu, Chung-Kuan Cheng
2009High performance on-chip differential signaling using passive compensation for global communication.Ling Zhang, Yulei Zhang, Akira Tsuchiya, Masanori Hashimoto, Ernest S. Kuh, Chung-Kuan Cheng
2009Scheduled voltage scaling for increasing lifetime in the presence of NBTI.Lide Zhang, Robert P. Dick
2009A control theory approach for thermal balancing of MPSoC.Francesco Zanini, David Atienza, Giovanni De Micheli
2009Peak temperature control in thermal-aware behavioral synthesis through allocating the number of resources.Junbo Yu, Qiang Zhou, Jinian Bian
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