| 2005 | On-chip thermal gradient analysis and temperature flattening for SoC design. | Takashi Sato, Junji Ichimiya, Nobuto Ono, Koutaro Hachiya, Masanori Hashimoto |
| 2005 | Successive pad assignment algorithm to optimize number and location of power supply pad using incremental matrix inversion. | Takashi Sato, Masanori Hashimoto, Hidetoshi Onodera |
| 2005 | Evaluation of the statistical delay quality model. | Yasuo Sato, Shuji Hamada, Toshiyuki Maeda, Atsuo Takatori, Seiji Kajihara |
| 2005 | REMIC: design of a reactive embedded microprocessor core. | Zoran A. Salcic, Dong Hui, Partha S. Roop, Morteza Biglari-Abhari |
| 2005 | Arrival time aware scheduling to minimize clock cycle length. | Rafael Ruiz-Sautua, Mara C. Molina, Jos M. Mendas, Romn Hermida |
| 2005 | Cluster-based detection of SEU-caused errors in LUTs of SRAM-based FPGAs. | E. Syam Sundar Reddy, Vikram Chandrasekhar, Milagros Sashiknth, V. Kamakoti, Narayanan Vijaykrishnan |
| 2005 | Partitioning and placement for buildable QCA circuits. | Ramprasad Ravichandran, Michael T. Niemier, Sung Kyu Lim |
| 2005 | Fault tolerant nanoelectronic processor architectures. | Wenjing Rao, Alex Orailoglu, Ramesh Karri |
| 2005 | Sleep transistor sizing using timing criticality and temporal currents. | Anand Ramalingam, Bin Zhang, Anirudh Devgan, David Z. Pan |
| 2005 | Optimal placement by branch-and-price. | Pradeep Ramachandaran, Ameya R. Agnihotri, Satoshi Ono, Purushothaman Damodaran, Krishnaswami Srihari, Patrick H. Madden |
| 2005 | Bridging fault detection in Double Fixed-Polarity Reed-Muller (DFPRM) PLA. | Hafizur Rahaman, Debesh K. Das |
| 2005 | Design at the end of the silicon roadmap. | Jan M. Rabaey |
| 2005 | Wideband modeling of RF/Analog circuits via hierarchical multi-point model order reduction. | Zhenyu Qi, Sheldon X.-D. Tan, Hao Yu, Lei He |
| 2005 | A novel differential VCO circuit design for USB Hub. | Gong Qian, Yuan Guo-shun |
| 2005 | STACCATO: disjoint support decompositions from BDDs through symbolic kernels. | Stephen Plaza, Valeria Bertacco |
| 2005 | Embedded tutorial I: design for manufacturability. | Vijay Pitchumani |
| 2005 | A clustering technique to optimize hardware/software synchronization. | Junyu Peng, Samar Abdi, Daniel Gajski |
| 2005 | Automated throughput-driven synthesis of bus-based communication architectures. | Sudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdhane |
| 2005 | Customized on-chip memories for embedded chip multiprocessors. | Ozcan Ozturk, Mahmut T. Kandemir, G. Chen, Mary Jane Irwin, Mustafa Karaky |
| 2005 | MAIA: a framework for networks on chip generation and verification. | Luciano Ost, Aline Mello, Jos Palma, Fernando Gehm Moraes, Ney Calazans |
| 2005 | On structure and suboptimality in placement. | Satoshi Ono, Patrick H. Madden |
| 2005 | An AMBA AHB-based reconfigurable SOC architecture using multiplicity of dedicated flyby DMA blocks. | Adeoye Olugbon, Sami Khawam, Tughrul Arslan, Ioannis Nousias, Iain Lindsay |
| 2005 | A dynamic reconfigurable RF circuit architecture. | Kenichi Okada, Yoshiaki Yoshihara, Hirotaka Sugawara, Kazuya Masu |
| 2005 | Speed and voltage selection for GALS systems based on voltage/frequency islands. | Koushik Niyogi, Diana Marculescu |
| 2005 | The design and implementation of a DVB receiving chip with PCI interface. | Ningyi Xu, Shaohua Li, Wei Yu, Guanghui He, Hao Zhang, Fei Luo, Zucheng Zhou |