| 2003 | Performance optimization of synchronous control units for datapaths with variable delay arithmetic units. | Euiseok Kim, Dong-Ik Lee, Hiroshi Saito, Hiroshi Nakamura, Jeong-Gun Lee, Takashi Nanya |
| 2003 | Trace-driven rapid pipeline architecture evaluation scheme for ASIP design. | Jun Kyoung Kim, Tag Gon Kim |
| 2003 | An effective SDRAM power mode management scheme for performance and energy sensitive embedded systems. | Ning-Yaun Ker, Chung-Ho Chen |
| 2003 | Capturing and analyzing requirement: in case of software and applying to hardware. | Akira Kawaguchi |
| 2003 | Error correction circuit using difference-set cyclic code. | Yukihiro Kato, Tomokazu Morita |
| 2003 | A technology mapping algorithm for heterogeneous FPGAs. | Chi-Chou Kao, Yen-Tai Lai |
| 2003 | Technology mapping for low leakage power and high speed with hot-carrier effect consideration. | Chang Woo Kang, Massoud Pedram |
| 2003 | SEA: fast power estimation for micro-architectures. | Praveen Kalla, Jrg Henkel, Xiaobo Sharon Hu |
| 2003 | Highly scalable algorithms for rectilinear and octilinear Steiner trees. | Andrew B. Kahng, Ion I. Mandoiu, Alexander Zelikovsky |
| 2003 | UTACO: a unified timing and congestion optimizing algorithm for standard cell global routing. | Tong Jing, Xianlong Hong, Haiyun Bao, Yici Cai, Jingyu Xu, Chung-Kuan Cheng, Jun Gu |
| 2003 | Simultaneous floorplanning and buffer block planning. | Iris Hui-Ru Jiang, Yao-Wen Chang, Jing-Yang Jou, Kai-Yuan Chao |
| 2003 | Don't cares in logic minimization of extended finite state machines. | Yunjian Jiang, Robert K. Brayton |
| 2003 | Robust high-performance low-power carry select adder. | Woopyo Jeong, Kaushik Roy |
| 2003 | Low power synthesis of finite state machines with mixed D and T flip-flops. | Ali Iranli, Peyman Rezvani, Massoud Pedram |
| 2003 | Evaluation of multiple-output logic functions using decision diagrams. | Yukihiro Iguchi, Tsutomu Sasao, Munehiro Matsuura |
| 2003 | A seed selection procedure for LFSR-based random pattern generators. | Kenichi Ichino, Ko-ichi Watanabe, Masayuki Arai, Satoshi Fukumoto, Kazuhiko Iwasaki |
| 2003 | Energy-aware mapping for tile-based NoC architectures under performance constraints. | Jingcao Hu, Radu Marculescu |
| 2003 | An efficient IP-level power model for complex digital circuits. | Chih-Yang Hsu, Chien-Nan Jimmy Liu, Jing-Yang Jou |
| 2003 | A path-based timing-driven quadratic placement algorithm. | Wenting Hou, Xianlong Hong, Weimin Wu, Yici Cai |
| 2003 | Temperature-independence-point properties for 0.1μm-scale pocket-implant technologies and the impact on circuit design. | Kazuya Hisamitsu, Hiroaki Ueno, Masayasu Tanaka, Daisuke Kitamaru, Mitiko Miura-Mattausch, Hans Jrgen Mattausch, Shigetaka Kumashiro, Tetsuya Yamaguchi, Kyoji Yamashita, Noriaki Nakayama |
| 2003 | Implementation of fast CRC calculation. | Tomas Henriksson, Dake Liu |
| 2003 | Issues in debugging highly parallel FPGA-based applications derived from source code. | K. Scott Hemmert, Brad L. Hutchings |
| 2003 | The design of PCI bus interface. | Haruyasu Hayasaka, Hiroaki Haramiishi, Naohiko Shimizu |
| 2003 | Accelerating design space exploration using pareto-front arithmetics. | Christian Haubelt, Jrgen Teich |
| 2003 | Design methodology of low-power microprocessors. | Toshihiro Hattori |