Skip to content

Asia and South Pacific Design Automation Conference

ASPDAC

B

CORE rank

CORE rank (raw)

B

Fields of research

Distributed Computing and Systems Software

Papers indexed

4,548

1995–2026

Papers per year

1995301 peak2026

ASPDAC papers

4,548 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2000Improved algorithms for hypergraph bipartitioning.Andrew E. Caldwell, Andrew B. Kahng, Igor L. Markov
2000Offline program re-mapping to improve branch prediction efficiency in embedded systems.Stephen S. Brown, Jeet Asher, William H. Mangione-Smith
2000SystemC standard.Guido Arnout
2000Issues on SOC testing in DSM area: embedded tutorial.Takashi Aikyo
1999An Analytical Delay Model for SRAM-Based FPGA Interconnections.Feng Zhou, Zhijun Huang, Jiarong Tong, Pushan Tang
1999Enhancing the Efficiency of Reduction of Large RC networks By Pole Analysis via Congruence Transformations.Hui Zheng, Wenjun Zhang, Lilin Tian, Zhilian Yang
1999A Method for Evaluating Upper Bound of Simultaneous Switching Gates Using Circuit Partition.Kai Zhang, Tsuyoshi Shinogi, Haruhiko Takase, Terumine Hayashi
1999Diagnosing Single Faults for Interconnects in SRAM Based FPGAs.Yinlei Yu, Jian Xu, Wei-Kang Huang, Fabrizio Lombardi
1999Optimal Evaluation Clocking of Self-Resetting Domino Pipelines.Kenneth Y. Yun, Ayoob E. Dooply
1999Recent Advances in Asynchronous Design Methodologies.Kenneth Y. Yun
1999Slicing Floorplans with Boundary Constraint.Fung Yu Young, D. F. Wong
1999Clock Period Minimization of Semi-Synchronous Circuits by Gate-Level Delay Insertion.Tomoyuki Yoda, Atsushi Takahashi, Yoji Kajitani
1999Power Consumption in XOR-Based Circuits.Yibin Ye, Kaushik Roy, Rolf Drechsler
1999Technnology Mapping for Low Power.Ching-Wei Yeh, Chin-Chao Chang, Jinn-Shyan Wang
1999An SA-Based Nonlinear Function Synthesizer for Linear Analog Integrated Circuits.Huazhong Yang, Rong Luo, Hui Wang, Runsheng Liu
1999Crosstalk Reduction by Transistor Sizing.Tong Xiao, Malgorzata Marek-Sadowska
1999Testing Interconnects of Dynamic Reconfigurable FPGAs.Chi-Feng Wu, Cheng-Wen Wu
1999Design and Optimization of Power/Ground Network for Cell-Based VLSIs with Macro Cells.Xiaohai Wu, Changge Qiao, Xianlong Hong
1999A Technology-Independent Methodology of Placement Generation for Analog Circuit.Wai-chee Wong, Philip C. H. Chan, Wai-On Law
1999A Performance-Driven I/O Pin Routing Algorithm.Dongsheng Wang, Ping Zhang, Chung-Kuan Cheng, Arunabha Sen
1999An LSI Implementation of an Adaptive Genetic Algorithm with On-The Fly Crossover Operator Selection.Shin'ichi Wakabayashi, Tetsushi Koide, Naoyoshi Toshine, Mutsuaki Goto, Yoshikatsu Nakayama, Koichi Hatta
1999A Hardware/Software Partitioning Algorithm for Processor Cores of Digital Signal Processing.Nozomu Togawa, Takashi Sakurai, Masao Yanagisawa, Tatsuo Ohtsuki
1999Balanced Multi-Level Multi-Way Partitioning of Large Analog Circuits for Hierarchical Symbolic Analysis.Xiang-Dong Tan, Chuanjin Richard Shi
1999An Efficient Aopproach to Constrained Via Minimization for Two-Layer VLSI Routing.Maolin Tang, Kamran Eshraghian, Hon Nin Cheung
1999Formal Design Verification for Correctness of Pipelined Microprocessors with Out-of-order Instruction Execution.Takashi Takenaka, Junji Kitamichi, Teruo Higashino, Kenichi Taniguchi
4,1764,200 of 4,548← PreviousNext →

Comparable venues

Other A*/A conferences filed under the same field of research.