| 2010 | Wideband reduced modeling of interconnect circuits by adaptive complex-valued sampling method. | Hai Wang, Sheldon X.-D. Tan, Gengsheng Chen |
| 2010 | Data learning based diagnosis. | Li-C. Wang |
| 2010 | A method for debugging of pipelined processors in formal verification by correspondence checking. | Miroslav N. Velev, Ping Gao |
| 2010 | A high performance low complexity joint transceiver for closed-loop MIMO applications. | Jian-Lung Tzeng, Chien-Jen Huang, Yu-Han Yuan, Hsi-Pin Ma |
| 2010 | Variation tolerant logic mapping for crossbar array nano architectures. | Cihan Tunc, Mehdi Baradaran Tahoori |
| 2010 | Resilient design in scaled CMOS for energy efficiency. | James W. Tschanz, Keith A. Bowman, Muhammad M. Khellah, Chris Wilkerson, Bibiche M. Geuskens, Dinesh Somasekhar, Arijit Raychowdhury, Jaydeep P. Kulkarni, Carlos Tokunaga, Shih-Lien Lu, Tanay Karnik, Vivek De |
| 2010 | A new method to improve accuracy of parasitics extraction considering sub-wavelength lithography effects. | Kuen-Yu Tsai, Wei-Jhih Hsieh, Yuan-Ching Lu, Bo-Sen Chang, Sheng-Wei Chien, Yi-Chang Lu |
| 2010 | Checker-pattern and shared two pixels LOFIC CMOS image sensors. | Yoshiaki Tashiro, Shun Kawada, Shin Sakai, Shigetoshi Sugawa |
| 2010 | A new compilation technique for SIMD code generation across basic block boundaries. | Hiroaki Tanaka, Yutaka Ota, Nobu Matsumoto, Takuji Hieda, Yoshinori Takeuchi, Masaharu Imai |
| 2010 | A 60GHz direct-conversion transmitter in 65nm CMOS technology. | Naoki Takayama, Kota Matsushita, Shogo Ito, Ning Li, Kenichi Okada, Akira Matsuzawa |
| 2010 | A versatile recognition processor for sensor network applications. | Risako Takashima, Yuya Hanai, Yuichi Hori, Tadahiro Kuroda |
| 2010 | LibGALS: a library for GALS systems design and modeling. | Wei-Tsun Sun, Zoran Salcic, Avinash Malik |
| 2010 | Workload capacity considering NBTI degradation in multi-core systems. | Jin Sun, Roman L. Lysecky, Karthik Shankar, Avinash Karanth Kodi, Ahmed Louri, Janet Meiling Wang |
| 2010 | Application of ESL synthesis on GSM edge algorithm for base station. | Alan P. Su |
| 2010 | A low latency wormhole router for asynchronous on-chip networks. | Wei Song, Doug A. Edwards |
| 2010 | A novel si-tunnel FET based SRAM design for ultra low-power 0.3V V | Jawar Singh, Krishnan Ramakrishnan, Saurabh Mookerjea, Suman Datta, Narayanan Vijaykrishnan, Dhiraj K. Pradhan |
| 2010 | Blockage-avoiding buffered clock-tree synthesis for clock latency-range and skew minimization. | Xin-Wei Shih, Chung-Chun Cheng, Yuan-Kai Ho, Yao-Wen Chang |
| 2010 | A flexible hybrid simulation platform targeting multiple configurable processors SoC. | Hao Shen, Frdric Ptrot |
| 2010 | Hybrid dynamic energy and thermal management in heterogeneous embedded multiprocessor SoCs. | Shervin Sharifi, Ayse Kivilcim Coskun, Tajana Simunic Rosing |
| 2010 | Maximizing the harvested energy for micro-power applications through efficient MPPT and PMU design. | Hui Shao, Chi-Ying Tsui, Wing-Hung Ki |
| 2010 | Bounded potential slack: enabling time budgeting for dual-Vt allocation of hierarchical design. | Jun Seomun, Seungwhun Paik, Youngsoo Shin |
| 2010 | Dynamic and adaptive allocation of applications on MPSoC platforms. | Andreas Schranzhofer, Jian-Jia Chen, Luca Santinelli, Lothar Thiele |
| 2010 | System-level development of embedded software. | Gunar Schirner, Andreas Gerstlauer, Rainer Dmer |
| 2010 | Design of complex image processing systems in ESL. | Benjamin Carrin Schfer, Ashish Trambadia, Kazutoshi Wakabayashi |
| 2010 | MuCCRA-3: a low power dynamically reconfigurable processor array. | Yoshiki Saito, Toru Sano, Masaru Kato, Vasutan Tunbunheng, Yoshihiro Yasuda, Masayuki Kimura, Hideharu Amano |