| 2025 | Generative Model Based Standard Cell Timing Library Characterization. | Hao-Yu Wu, Hsin-Tzu Chang, Shiuan-Yun Ding, Iris Hui-Ru Jiang, Benson Tsao, Vinson Wu, Wei-Kai Shih |
| 2025 | SpecASR: Accelerating LLM-based Automatic Speech Recognition via Speculative Decoding. | Linye Wei, Shuzhang Zhong, Songqiang Xu, Runsheng Wang, Ru Huang, Meng Li |
| 2025 | Buffer Prospector: Discovering and Exploiting Untapped Buffer Resources in Many-Core DNN Accelerators. | Yuchen Wei, Jingwei Cai, Mingyu Gao, Sen Peng, Zuotong Wu, Guiming Shi, Kaisheng Ma |
| 2025 | Monolithic 3D FPGA Design and Synthesis with Back-End-of-Line Configuration Memories. | Faaiq G. Waqar, Jiahao Zhang, Anni Lu, Zifan He, Jason Cong, Shimeng Yu |
| 2025 | NVR: Vector Runahead on NPUs for Sparse Memory Access. | Hui Wang, Zhengpeng Zhao, Jing Wang, Yushu Du, Yuan Cheng, Bing Guo, He Xiao, Chenhao Ma, Xiaomeng Han, Dean You, Jiapeng Guan, Ran Wei, Dawei Yang, Zhe Jiang |
| 2025 | Ares: High Performance Near-Storage Accelerator for FHE-based Private Set Intersection. | Haoxuan Wang, Yinghao Yang, Jinkai Zhang, Hang Lu, Xiaowei Li |
| 2025 | Hypnos: Memory Efficient Homomorphic Processing Unit. | Haoxuan Wang, Yinghao Yang, Hang Lu, Xiaowei Li |
| 2025 | The Unwritten Contract of Cloud-based Elastic Solid-State Drives. | Yingjia Wang, Ming-Chang Yang |
| 2025 | MILLION: MasterIng Long-Context LLM Inference Via Outlier-Immunized KV Product QuaNtization. | Zongwu Wang, Peng Xu, Fangxin Liu, Yiwei Hu, Qingxiao Sun, Gezi Li, Cheng Li, Xuan Wang, Li Jiang, Haibing Guan |
| 2025 | ZION: A Practical Confidential Virtual Machine Architecture on Commodity RISC-V Processors. | Jie Wang, Juan Wang, Yinqian Zhang |
| 2025 | EPICS: Efficient Parallel Pattern Fault Simulation for Sequential Circuits via Strongly Connected Components. | Mingjun Wang, Hui Wang, Jianan Mu, Xinyu Zhang, Bin Sun, Yihan Wen, Zizhen Liu, Feng Gu, Jun Gao, Shengwen Liang, Jing Ye, Xiaowei Li, Huawei Li |
| 2025 | PacTrain: Pruning and Adaptive Sparse Gradient Compression for Efficient Collective Communication in Distributed Deep Learning. | Yisu Wang, Ruilong Wu, Xinjiao Li, Dirk Kutscher |
| 2025 | ZenLeak: Practical Last-Level Cache Side-Channel Attacks on AMD Zen Processors. | Han Wang, Ming Tang, Quancheng Wang, Ke Xu, Yinqian Zhang |
| 2025 | MOSS: Multi-Modal Representation Learning on Sequential Circuits. | Mingjun Wang, Bin Sun, Jianan Mu, Feng Gu, Boyu Han, Tianmeng Yang, Xinyu Zhang, Silin Liu, Yihan Wen, Hui Wang, Jun Gao, Zhiteng Chao, Husheng Han, Zizhen Liu, Shengwen Liang, Jing Ye, Bei Yu, Xiaowei Li, Huawei Li |
| 2025 | DenSparSA: A Balanced Systolic Array Approach for Dense and Sparse Matrix Multiplication. | Ziheng Wang, Ruiqi Sun, Xin He, Tianrui Ma, An Zou |
| 2025 | Leopard: Hardware Pass-Through Remote Storage Access with Queue Concurrency for Edge Intelligent Workstations. | Wenjie Wang, Bo Peng, Jianguo Yao, Haibing Guan |
| 2025 | FlexStep: Enabling Flexible Error Detection in Multi/Many-core Real-time Systems. | Tinglue Wang, Yiming Li, Wei Tang, Jiapeng Guan, Zhenghui Guo, Renshuang Jiang, Ran Wei, Jing Li, Zhe Jiang |
| 2025 | Synergistic Die-Level Router for Multi-FPGA System with Time-Division Multiplexing Optimization. | Jiarui Wang, Yanjing Liu, Yibo Lin |
| 2025 | NoiseZO: RRAM Noise-Driven Zeroth-Order Optimization for Efficient Forward-Only Training. | Shuqi Wang, Zhengwu Liu, Chenchen Ding, Chen Zhang, Taiqiang Wu, Jiajun Zhou, Ngai Wong |
| 2025 | Mr.TPL: A Method for Multi-Pin Net Router in Triple Patterning Lithography. | Chengkai Wang, Weiqing Ji, Mingyang Kou, Zhiyang Chen, Fei Li, Nengyong Zhu, Hailong Yao |
| 2025 | TetrisLock: Quantum Circuit Split Compilation with Interlocking Patterns. | Qian Wang, Jayden John, Ben Dong, Yuntao Liu |
| 2025 | Late Breaking Results: Opera: An Open and Efficient Platform for Data-driven Synthesis of Analog Circuits. | Shikai Wang, Yaolong Hu, Zhiqiang Yi, Taiyun Chi, Weidong Cao |
| 2025 | Can Short Hypervectors Drive Feature-Rich GNNs? Strengthening the Graph Representation of Hyperdimensional Computing for Memory-efficient GNNs. | Jihe Wang, Yuxi Han, Danghui Wang |
| 2025 | Graph-Guided Transfer Learning to Boost the Efficiency of System-Level Optimization of Analog/Mixed-Signal Circuits. | Jiaqi Wang, Georges G. E. Gielen |
| 2025 | FPGA-TrustZone: Security Extension of TrustZone to FPGA for SoC-FPGA Heterogeneous Architecture. | Shupeng Wang, Xindong Fan, Xiao Xu, Shuchen Wang, Lei Ju, Zimeng Zhou |