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Design, Automation and Test in Europe Conference

DATE

A

CORE rank

CORE rank (raw)

A

Fields of research

Computer Systems Engineering · Software Engineering

Papers indexed

9,217

1995–2026

Papers per year

1995445 peak2026

DATE papers

9,217 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2018Embedded randomness and data dependencies design paradigm: Advantages and challenges.Itamar Levi, Yehuda Rudin, Alexander Fish, Osnat Keren
2018Resilience evaluation via symbolic fault injection on intermediate code.Hoang M. Le, Vladimir Herdt, Daniel Groe, Rolf Drechsler
2018Using polyhedral techniques to tighten WCET estimates of optimized code: A case study with array contraction.Thomas Lefeuvre, Imen Fassi, Christoph Cullmann, Gernot Gebhard, Emin-Koray Kasnakli, Isabelle Puaut, Steven Derrien
2018Logic optimization with considering boolean relations.Tung-Yuan Lee, Chia-Cheng Wu, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang
2018Correlation manipulating circuits for stochastic computing.Vincent T. Lee, Armin Alaghi, Luis Ceze
2018Improving fast charging efficiency of reconfigurable battery packs.Alexander Lamprecht, Swaminathan Narayanaswamy, Sebastian Steinhorst
2018Non-intrusive program tracing of non-preemptive multitasking systems using power consumption.Kamal Lamichhane, Carlos Moreno, Sebastian Fischmeister
2018Efficient synthesis of approximate threshold logic circuits with an error rate guarantee.Yung-An Lai, Chia-Chun Lin, Chia-Cheng Wu, Yung-Chih Chen, Chun-Yao Wang
2018Pump-aware flow routing algorithm for programmable microfluidic devices.Guan-Ru Lai, Chun-Yu Lin, Tsung-Yi Ho
2018DroNet: Efficient convolutional neural network detector for real-time UAV applications.Christos Kyrkou, George Plastiras, Theocharis Theocharides, Stylianos I. Venieris, Christos-Savvas Bouganis
2018Heterogeneous PCM array architecture for reliability, performance and lifetime enhancement.Taehyun Kwon, Muhammad Imran, Jung Min You, Joon-Sung Yang
2018Improving circuit size upper bounds using SAT-solvers.Alexander S. Kulikov
2018On the reuse of timing resilient architecture for testing path delay faults in critical paths.Felipe A. Kuentzer, Leonardo Rezende Juracy, Alexandre M. Amory
2018LARS: Logically adaptable retention time STT-RAM cache for embedded systems.Kyle Kuan, Tosiron Adegbija
2018Improving the error behavior of DRAM by exploiting its Z-channel property.Kira Kraft, Chirag Sudarshan, Deepak M. Mathew, Christian Weis, Norbert Wehn, Matthias Jung
2018Degradation analysis of high performance 14nm FinFET SRAM.Daniel Kraak, Innocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Francky Catthoor
2018Smart instruction codes for in-memory computing architectures compatible with standard SRAM interfaces.Maha Kooli, Henri-Pierre Charles, Clment Touzet, Bastien Giraud, Jean-Philippe Noel
2018PHYLAX: Snapshot-based profiling of real-time embedded devices via JTAG interface.Charalambos Konstantinou, Eduardo Chielle, Michail Maniatakos
2018Main memory organization trade-offs with DRAM and STT-MRAM options based on gem5-NVMain simulation frameworks.Manu Komalan, Oh Hyung Rock, Matthias Hartmann, Sushil Sakhare, Christian Tenllado, Jos Ignacio Gmez, Gouri Sankar Kar, Arnaud Furnmont, Francky Catthoor, Sophiane Senni, David Novo, Abdoulaye Gamati, Lionel Torres
2018SPA: Simple pool architecture for application resource allocation in many-core systems.Jayasimha Sai Koduri, Iraklis Anagnostopoulos
2018Bayesian theory based switching probability calculation method of critical timing path for on-chip timing slack monitoring.Byung-Su Kim, Joon-Sung Yang
2018StreamFTL: Stream-level address translation scheme for memory constrained flash storage.Hyukjoong Kim, Kyuhwa Han, Dongkun Shin
2018MATIC: Learning around errors for efficient low-voltage neural network accelerators.Sung Kim, Patrick Howe, Thierry Moreau, Armin Alaghi, Luis Ceze, Visvesh Sathe
2018Fast chip-package-PCB coanalysis methodology for power integrity of multi-domain high-speed memory: A case study.Seungwon Kim, Ki Jin Han, Youngmin Kim, Seokhyeong Kang
2018DFARPA: Differential fault attack resistant physical design automation.Mustafa Khairallah, Rajat Sadhukhan, Radhamanjari Samanta, Jakub Breier, Shivam Bhasin, Rajat Subhra Chakraborty, Anupam Chattopadhyay, Debdeep Mukhopadhyay
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