Design, Automation and Test in Europe Conference
DATE
A
CORE rank
CORE rank (raw)
A
Fields of research
Computer Systems Engineering · Software Engineering
Papers indexed
9,217
1995–2026
Papers per year
1995445 peak2026
Most published authors
DATE papers
9,217 records sourced from DBLP. Search titles, filter by year, sort by recency.
| Year | Title | Authors |
|---|---|---|
| 2017 | Design automation for quantum architectures. | Martin Rtteler, Krysta M. Svore, Dave Wecker, Nathan Wiebe |
| 2017 | Long range wireless sensing powered by plant-microbial fuel cell. | Maurizio Rossi, Pietro Tosato, Luca Gemma, Luca Torquati, Cristian Catania, Sergio Camalo, Davide Brunelli |
| 2017 | Hardware-accelerated dynamic binary translation. | Simon Rokicki, Erven Rohou, Steven Derrien |
| 2017 | Dude, is my code constant time? | Oscar Reparaz, Josep Balasch, Ingrid Verbauwhede |
| 2017 | Generation of complex quantum states via integrated frequency combs. | Christian Reimer, Michael Kues, Piotr Roztocki, Benjamin Wetzel, Brent E. Little, Sai T. Chu, Lucia Caspani, David J. Moss, Roberto Morandotti |
| 2017 | Blind identification of power sources in processors. | Sherief Reda, Adel Belouchrani |
| 2017 | LookNN: Neural network with no multiplication. | Mohammad Samragh Razlighi, Mohsen Imani, Farinaz Koushanfar, Tajana Rosing |
| 2017 | STAxCache: An approximate, energy efficient STT-MRAM cache. | Ashish Ranjan, Swagath Venkataramani, Zoha Pajouhi, Rangharajan Venkatesan, Kaushik Roy, Anand Raghunathan |
| 2017 | Utilization difference based partitioned scheduling of mixed-criticality systems. | Saravanan Ramanathan, Arvind Easwaran |
| 2017 | Exploiting transistor-level reconfiguration to optimize combinational circuits. | Michael Raitza, Akash Kumar, Marcus Vlp, Dennis Walter, Jens Trommer, Thomas Mikolajick, Walter M. Weber |
| 2017 | Design space exploration of FPGA accelerators for convolutional neural networks. | Atul Rahman, Sangyun Oh, Jongeun Lee, Kiyoung Choi |
| 2017 | Pushing the limits of voltage over-scaling for error-resilient applications. | Rengarajan Ragavan, Benjamin Barrois, Cdric Killian, Olivier Sentieys |
| 2017 | Heterogeneous exascale supercomputing: The role of CAD in the exaFPGA project. | Marco Rabozzi, Giuseppe Natale, Emanuele Del Sozzo, Alberto Scolari, Luca Stornaiuolo, Marco D. Santambrogio |
| 2017 | A true random number generator based on parallel STT-MTJs. | Yuanzhuo Qu, Jie Han, Bruce F. Cockburn, Witold Pedrycz, Yue Zhang, Weisheng Zhao |
| 2017 | Energy-efficient approximate multiplier design using bit significance-driven logic compression. | Issa Qiqieh, Rishad A. Shafik, Ghaith Tarawneh, Danil Sokolov, Alex Yakovlev |
| 2017 | GATSim: Abstract timing simulation of GPUs. | Kishore Punniyamurthy, Behzad Boroujerdian, Andreas Gerstlauer |
| 2017 | Automatic operating point distillation for hybrid mapping methodologies. | Behnaz Pourmohseni, Michael Gla, Jrgen Teich |
| 2017 | Synthesis of on-chip control circuits for mVLSI biochips. | Seetal Potluri, Alexander Schneider, Martin Horslev-Petersen, Paul Pop, Jan Madsen |
| 2017 | Cut mask optimization for multi-patterning directed self-assembly lithography. | Wachirawit Ponghiran, Seongbo Shim, Youngsoo Shin |
| 2017 | A bridging fault model for line coverage in the presence of undetected transition faults. | Irith Pomeranz |
| 2017 | MeSAP: A fast analytic power model for DRAM memories. | Sandeep Poddar, Rik Jongerius, Leandro Fiorin, Giovanni Mariani, Gero Dittmann, Andreea Anghel, Henk Corporaal |
| 2017 | BITMAN: A tool and API for FPGA bitstream manipulations. | Khoa Dang Pham, Edson L. Horta, Dirk Koch |
| 2017 | Advanced spintronic memory and logic for non-volatile processors. | Robert Perricone, Ibrahim Ahmed, Zhaoxin Liang, Meghna G. Mankalale, Xiaobo Sharon Hu, Chris H. Kim, Michael T. Niemier, Sachin S. Sapatnekar, Jianping Wang |
| 2017 | Scalable probabilistic power budgeting for many-cores. | Anuj Pathania, Heba Khdr, Muhammad Shafique, Tulika Mitra, Jrg Henkel |
| 2017 | A hardware implementation of the MCAS synchronization primitive. | Srishty Patel, Rajshekar Kalayappan, Ishani Mahajan, Smruti R. Sarangi |
3,276–3,300 of 9,217← PreviousNext →
Comparable venues
Other A*/A conferences filed under the same field of research.
- A*DACDesign Automation Conf
- ASCInternational Conference for High Performance Computing, Networking, Storage and Analysis (was Supercomputing Conference)
- AICCADIEEE/ACM International Conference on Computer-Aided Design
- AITCIEEE International Test Conference
- A*ISCAACM International Symposium on Computer Architecture
- A*MICROInternational Symposium on Microarchitecture
- AISLPEDIEEE/ACM International Symposium on Low Power Electronics and Design
- AICSACM International Conference on Supercomputing