| 2014 | Emulation-based robustness assessment for automotive smart-power ICs. | Manuel Harrant, Thomas Nirmaier, Jrme Kirscher, Christoph Grimm, Georg Pelz |
| 2014 | Equivalence checking for function pipelining in behavioral synthesis. | Kecheng Hao, Sandip Ray, Fei Xie |
| 2014 | SAFE: Security-Aware FlexRay Scheduling Engine. | Gang Han, Haibo Zeng, Yaping Li, Wenhua Dou |
| 2014 | A deep learning methodology to proliferate golden signoff timing. | Seung-Soo Han, Andrew B. Kahng, Siddhartha Nath, Ashok S. Vydyanathan |
| 2014 | Hacking and protecting IC hardware. | Said Hamdioui, Jean-Luc Danger, Giorgio Di Natale, Fethulah Smailbegovic, Gerard van Battum, Mark Tehranipoor |
| 2014 | On the assumption of mutual independence of jitter realizations in P-TRNG stochastic models. | Patrick Haddad, Yannick Teglia, Florent Bernard, Viktor Fischer |
| 2014 | EATBit: Effective automated test for binary translation with high code coverage. | Hui Guo, Zhenjiang Wang, Chenggang Wu, Ruining He |
| 2014 | Partitioned mixed-criticality scheduling on multiprocessor platforms. | Chuancai Gu, Nan Guan, Qingxu Deng, Wang Yi |
| 2014 | A unified methodology for a fast benchmarking of parallel architecture. | Alexandre Guerre, Jean-Thomas Acquaviva, Yves Lhuillier |
| 2014 | A cross-level verification methodology for digital IPs augmented with embedded timing monitors. | Valerio Guarnieri, Massimo Petricca, Alessandro Sassone, Sara Vinco, Nicola Bombieri, Franco Fummi, Enrico Macii, Massimo Poncino |
| 2014 | General and efficient Response Time Analysis for EDF scheduling. | Nan Guan, Wang Yi |
| 2014 | Multi-variant-based design space exploration for automotive embedded systems. | Sebastian Graf, Michael Gla, Jrgen Teich, Christoph Lauer |
| 2014 | Coupling TDM NoC and DRAM controller for cost and performance optimization of real-time systems. | Manil Dev Gomony, Benny Akesson, Kees Goossens |
| 2014 | Sigma-delta testability for pipeline A/D converters. | Antonio J. Gins, Gildas Lger |
| 2014 | Mapping mixed-criticality applications on multi-core architectures. | Georgia Giannopoulou, Nikolay Stoimenov, Pengcheng Huang, Lothar Thiele |
| 2014 | Highly accurate SPICE-compatible modeling for single- and double-gate GNRFETs with studies on technology scaling. | Morteza Gholipour, Ying-Yu Chen, Amit Sangai, Deming Chen |
| 2014 | Analyzing and eliminating the causes of fault sensitivity analysis. | Nahid Farhady Ghalaty, Aydin Aysu, Patrick Schaumont |
| 2014 | Resolving the memory bottleneck for single supply near-threshold computing. | Tobias Gemmeke, Mohamed M. Sabry, Jan Stuijt, Praveen Raghavan, Francky Catthoor, David Atienza |
| 2014 | An energy-aware fault tolerant scheduling framework for soft error resilient cloud computing systems. | Yue Gao, Sandeep K. Gupta, Yanzhi Wang, Massoud Pedram |
| 2014 | Modeling and analysis of digital linear dropout regulators with adaptive control for high efficiency under wide dynamic range digital loads. | Samantak Gangopadhyay, Youngtak Lee, Saad Bin Nasir, Arijit Raychowdhury |
| 2014 | INFORMER: An integrated framework for early-stage memory robustness analysis. | Shrikanth Ganapathy, Ramon Canal, Dan Alexandrescu, Enrico Costenaro, Antonio Gonzlez, Antonio Rubio |
| 2014 | Advanced system on a chip design based on controllable-polarity FETs. | Pierre-Emmanuel Gaillardon, Luca Gaetano Amar, Jian Zhang, Giovanni De Micheli |
| 2014 | Moving from co-simulation to simulation for effective smart systems design. | Franco Fummi, Michele Lora, Francesco Stefanni, Dimitrios Trachanis, Jahn Vanhese, Sara Vinco |
| 2014 | System design challenges for next generation wireless and embedded systems. | David Fuller |
| 2014 | A fault detection mechanism in a Data-flow scheduled Multithreaded processor. | Jian Fu, Qiang Yang, Raphael Poss, Chris R. Jesshope, Chunyuan Zhang |