| 2025 | Dcha: Distributed-Centralized Heterogeneous Architecture Enables Efficient Multi-Task Processing for Smart Sensing. | Erxiang Ren, Cheng Qu, Li Luo, Yonghua Li, Zheyu Liu, Xinghua Yang, Qi Wei, Fei Qiao |
| 2025 | TARN: Trust Aware Routing to Enhance Security in 3D Network-on-Chips. | Hasin Ishraq Reefat, Alec Aversa, Ioannis Savidis, Naghmeh Karimi |
| 2025 | Minimum Time Maximum Fault Coverage Testing of Spiking Neural Networks. | Spyridon Raptis, Haralampos-G. Stratigopoulos |
| 2025 | SoftmAP: Software-Hardware Co-Design for Integer-Only Softmax on Associative Processors. | Mariam Rakka, Jinhao Li, Guohao Dai, Ahmed M. Eltawil, Mohammed E. Fouda, Fadi J. Kurdahi |
| 2025 | One More Motivation to Use Evaluation Tools This Time for Hardware Multiplicative Masking of AES. | Hemin Rahimi, Amir Moradi |
| 2025 | CorrectBench: Automatic Testbench Generation with Functional Self-Correction using LLMs for HDL Design. | Ruidi Qiu, Grace Li Zhang, Rolf Drechsler, Ulf Schlichtmann, Bing Li |
| 2025 | Accelerating Authenticated Block Ciphers via RISC-V Custom Cryptography Instructions. | Yuhang Qiu, Wenming Li, Tianyu Liu, Zhen Wang, Zhiyuan Zhang, Zhihua Fan, Xiaochun Ye, Dongrui Fan, Zhimin Tang |
| 2025 | Operation Dependency Graph-Based Scheduling for High-Level Synthesis. | Aoxiang Qin, Minghua Shen, Nong Xiao |
| 2025 | NVCiM-PT: An NVCiM-Assisted Prompt Tuning Framework for Edge LLMs. | Ruiyang Qin, Pengyu Ren, Zheyu Yan, Liu Liu, Dancheng Liu, Amir Nassereldine, Jinjun Xiong, Kai Ni, X. Sharon Hu, Yiyu Shi |
| 2025 | AraXL: A Physically Scalable, Ultra-Wide RISC-V Vector Processor Design for Fast and Efficient Computation on Long Vectors. | Navaneeth Kunhi Purayil, Matteo Perotti, Tim Fischer, Luca Benini |
| 2025 | Are LLMs Ready for Practical Adoption for Assertion Generation? | Vaishnavi Pulavarthi, Deeksha Nandal, Soham Dan, Debjit Pal |
| 2025 | Coupling Neural Networks and Physics Equations For Li-Ion Battery State-of-Charge Prediction. | Giovanni Pollo, Alessio Burrello, Enrico Macii, Massimo Poncino, Sara Vinco, Daniele Jahier Pagliari |
| 2025 | Optimal Synthesis of Memristive Mixed-Mode Circuits. | Ilia Polian, Xianyue Zhao, Li-Wei Chen, Felix Bayhurst, Ziang Chen, Heidemarie Schmidt, Nan Du |
| 2025 | Mapping Spiking Neural Networks to Heterogeneous Crossbar Architectures using Integer Linear Programming. | Devin Pohl, Aaron R. Young, Kazi Asifuzzaman, Narasinga Rao Miniskar, Jeffrey S. Vetter |
| 2025 | HAAN: A Holistic Approach for Accelerating Normalization Operations in Large Language Models. | Tianfan Peng, Tianhua Xia, Jiajun Qin, Sai Qian Zhang |
| 2025 | Multi-Partner Project: Shaping the Vehicle of the Future - How FEDERATE and HAL4SDV are Steering Europe's Software-Defined Vehicle Ecosystem. | Michael Paulweber, Andreas Eckel, Paolo Azzoni |
| 2025 | SPB: Towards Low-Latency CXL Memory via Speculative Protocol Bypassing. | Junbum Park, Yongho Lee, Sungbin Jang, Wonyoung Lee, Seokin Hong |
| 2025 | Leveraging Hot Data in a Multi-Tenant Accelerator for Effective Shared Memory Management. | Chunmyung Park, Jicheon Kim, Eunjae Hyun, Xuan Truong Nguyen, Hyuk-Jae Lee |
| 2025 | DOTS: DRAM-PIM Optimization for Tall and Skinny GEMM Operations in LLM Inference. | Gyeonghwan Park, Sanghyeok Han, Byungkuk Yoon, Jae-Joon Kim |
| 2025 | COMPASS: A Compiler Framework for Resource-Constrained Crossbar-Array Based In-Memory Deep Learning Accelerators. | Jihoon Park, Jeongin Choe, Dohyun Kim, Jae-Joon Kim |
| 2025 | Late Breaking Results: Improving Deep SNNs with Gradient Clipping and Noise Exploitation in Neuromorphic Devices. | Seongsik Park, Jongkil Park, Hyun Jae Jang, Jaewook Kim, YeonJoo Jeong, Gye Weon Hwang, Inho Kim, Jong-Keuk Park, Kyeong Seok Lee, Suyoun Lee |
| 2025 | Less is More: Optimizing Function Calling for LLM Execution on Edge Devices. | Varatheepan Paramanayakam, Andreas Karatzas, Iraklis Anagnostopoulos, Dimitrios Stamoulis |
| 2025 | Multi-Partner Project: Secure Hardware Accelerated Data Analytics for 6G Networks: The PRIVATEER Approach. | Ilias Papalamprou, Aimilios Leftheriotis, Apostolis Garos, Georgios Gardikis, Maria Christopoulou, George Xilouris, Lampros Argyriou, Antonia Karamatskou, Nikolaos Papadakis, Emmanouil Kalotychos, Nikolaos Chatzivasileiadis, Dimosthenis Masouros, George Theodoridis, Dimitrios Soudris |
| 2025 | GRAMC: General-Purpose and Reconfigurable Analog Matrix Computing Architecture. | Lunshuai Pan, Shiqing Wang, Pushen Zuo, Zhong Sun |
| 2025 | Late Breaking Results: Leveraging Approximate Computing for Carbon-Aware DNN Accelerators. | Aikaterini Maria Panteleaki, Konstantinos Balaskas, Georgios Zervakis, Hussam Amrouch, Iraklis Anagnostopoulos |