| 2011 | A Unified Multiply/Accumulate Unit for Pairing-Based Cryptography over Prime, Binary and Ternary Fields. | Tobias Vejda, Johann Groschdl, Dan Page |
| 2011 | Modulo 2^n+1 Arithmetic Units with Embedded Diminished-to-Normal Conversion. | Evangelos Vassalos, Dimitris Bakalis, Haridimos T. Vergos |
| 2011 | Evaluation of Fault-Tolerant Routing Methods for NoC Architectures. | Mojtaba Valinataj |
| 2011 | Thermal Analysis of Job Allocation and Scheduling Schemes for 3D Stacked NoC's. | Kameswar Rao Vaddina, Amir-Mohammad Rahmani, Khalid Latif, Pasi Liljeberg, Juha Plosila |
| 2011 | SoC and Board Modeling for Processor-Centric Board Testing. | Anton Tsertov, Raimund Ubar, Artur Jutman, Sergei Devadze |
| 2011 | Path-Based Dynamic Voltage and Frequency Scaling Algorithms for Multiprocessor Embedded Applications with Soft Delay Deadlines. | Alice M. Tokarnia, Pedro C. F. Pepe, Leandro D. Pagotto |
| 2011 | An Energy Aware Design Space Exploration for VLIW AGU Model with Fine Grained Power Gating. | Ittetsu Taniguchi, Mitsuya Uchida, Hiroyuki Tomiyama, Masahiro Fukui, Praveen Raghavan, Francky Catthoor |
| 2011 | Microthreading as a Novel Method for Close Coupling of Custom Hardware Accelerators to SVP Processors. | Jaroslav Sykora, Leos Kafka, Martin Danek, Lukas Kohout |
| 2011 | SEU Simulation Framework for Xilinx FPGA: First Step towards Testing Fault Tolerant Systems. | Martin Straka, Jan Kastil, Zdenek Kotsek |
| 2011 | Breaking Hitag2 with Reconfigurable Hardware. | Petr Stembera, Martin Novotn |
| 2011 | Numeral-Based Crosstalk Avoidance Coding to Reliable NoC Design. | Mansour Shafaei, Ahmad Patooghy, Seyed Ghassem Miremadi |
| 2011 | Phase-Guided Scheduling on Single-ISA Heterogeneous Multicore Processors. | Lina Sawalha, Sonya R. Wolff, Monte P. Tull, Ronald D. Barnes |
| 2011 | VMAP: A Variation Map-Aware Placement Algorithm for Leakage Power Reduction in FPGAs. | Behzad Salami, Morteza Saheb Zamani, Ali Jahanian |
| 2011 | Chip Temperature Selfregulation for Digital Circuits Using Polymorphic Electronics Principles. | Richard Ruzicka, Vclav Simek |
| 2011 | On RTL Testability and Gate-Level Stuck-At-Fault Coverage Correlation for Scan Circuits. | Michal Rumplk, Josef Strnadel |
| 2011 | A Technique for Accelerating Injection of Transient Faults in Complex SoCs. | Alireza Rohani, Hans G. Kerkhoff |
| 2011 | LastZ: An Ultra Optimized 3D Networks-on-Chip Architecture. | Amir-Mohammad Rahmani, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen |
| 2011 | Low Power FPGA Implementations of JH and Fugue Hash Functions. | George Provelengios, Nikolaos S. Voros, Paris Kitsos |
| 2011 | Dynamic Flow Reconfiguration Strategy to Avoid Communication Hot-Spots. | Romain Prolonge, Fabien Clermidy, Leonel Tedesco, Fernando Moraes |
| 2011 | Hardware Implementation of a Flexible Tag Platform for Passive RFID Devices. | Thomas Plos, Martin Feldhofer |
| 2011 | An Overlapped Block Motion Compensation Hardware for Frame Rate Conversion. | Tevfik Zafer Ozcan, Cagla Cakir, Mert Cetin, Ilker Hamzaoglu |
| 2011 | Model Driven Cache-Aware Scheduling of Object Oriented Software for Chip Multiprocessors. | Tolga Ovatman, Feza Buzluca |
| 2011 | VHDL Code Generation from Formal Event-B Models. | Sergey Ostroumov, Leonidas Tsiopoulos |
| 2011 | A Parallel Ray Tracing Architecture Suitable for Application-Specific Hardware and GPGPU Implementations. | Alexandre Solon Nery, Nadia Nedjah, Felipe M. G. Frana, Lech Jzwiak |
| 2011 | Hardware Reuse in Modern Application-Specific Processors and Accelerators. | Alexandre Solon Nery, Lech Jzwiak, Menno Lindwer, Mauro Cocco, Nadia Nedjah, Felipe M. G. Frana |