| 2011 | Design of Fault Tolerant Network Interfaces for NoCs. | Leandro Fiorin, Laura Micconi, Mariagiovanna Sami |
| 2011 | On the Design of Modulo 2^n+1 Multipliers. | Constantinos Efstathiou, Kiamal Z. Pekmestzi, Nicholas Axelos |
| 2011 | On the Cascade Implementation of Multiple-Output Sparse Logic Functions. | Vclav Dvork, Petr Mikusek |
| 2011 | SAT-Based Generation of Compressed Skewed-Load Tests for Transition Delay Faults. | Roland Dobai, Marcel Balz |
| 2011 | Automated Design Debugging in a Testbench-Based Verification Environment. | Mehdi Dehbashi, Andr Slflow, Grschwin Fey |
| 2011 | FBMC and GFDM Interference Cancellation Schemes for Flexible Digital Radio PHY Design. | Rohit Datta, Gerhard P. Fettweis, Zsolt Kollr, Pter Horvth |
| 2011 | Faster Processor Allocation Algorithms for Mesh-Connected CMPs. | Luka B. Daoud, Mohamed El-Sayed Ragab, Victor Goulart |
| 2011 | A Wearable Intelligent System for the Health of Expectant Mom's and of Their Children. | Giovanni Danese, Francesco Leporati, Alessandra Majani, Giulia Matrone, Enrico Merlino |
| 2011 | Hybrid Code-Data Prefetch-Aware Multiprocessor Task Graph Scheduling. | Morteza Damavandpeyma, Sander Stuijk, Twan Basten, Marc Geilen, Henk Corporaal |
| 2011 | Thermal Effect of TSVs in 3D Die-Stacked Integrated Circuits. | Hadrien A. Clarke, Kazuaki J. Murakami |
| 2011 | A Novel Architecture of Implementing Error Detecting AES Using PRNS. | Junfeng Chu, Mohammed Benaissa |
| 2011 | Design of a Low Power, Sub-Threshold, Asynchronous Arithmetic Logic Unit Using a Bidirectional Adder. | Jiaoyan Chen, Dilip P. Vasudevan, Emanuel M. Popovici, Michel P. Schellekens |
| 2011 | Improved Power Modeling of DDR SDRAMs. | Karthik Chandrasekar, Benny Akesson, Kees Goossens |
| 2011 | Low-Latency and Low-Overhead Mesochronous and Plesiochronous Synchronizers. | Jean-Michel Chabloz, Ahmed Hemani |
| 2011 | Towards an Efficient NoC Topology through Multiple Injection Ports. | Jess Camacho Villanueva, Jos Flich, Jos Duato, Hans Eberle, Wladek Olesinski |
| 2011 | Rapid and Accurate Leakage Power Estimation for Nano-CMOS Circuits. | Michal Bryk, Lech Jzwiak, Wieslaw Kuzmicz |
| 2011 | Fault Models Usability Study for On-line Tested FPGA. | Jaroslav Boreck, Martin Kohlk, Pavel Kubalk, Hana Kubtov |
| 2011 | Automatic Interface Generation for Component Reuse in HW-SW Partitioning. | Nicola Bombieri, Franco Fummi, Sara Vinco, Davide Quaglia |
| 2011 | Comparison of Different Thread Scheduling Strategies for Asymmetric Chip MultiThreading Architectures in Embedded Systems. | Charly Bechara, Nicolas Ventroux, Daniel Etiemble |
| 2011 | On the Efficiency of Design Time Evaluation of the Resistance to Power Attacks. | Alessandro Barenghi, Guido Bertoni, Fabrizio De Santis, Filippo Melzani |
| 2011 | Energy Behaviour of NUCA Caches in CMPs. | Alessandro Bardine, Pierfrancesco Foglia, Francesco Panicucci, Marco Solinas, Julio Sahuquillo |
| 2011 | Techniques for SAT-Based Constrained Test Pattern Generation. | Jiri Balcarek, Petr Fiser, Jan Schmidt |
| 2011 | Design of Asynchronous Circuits on FPGAs for Soft Error Tolerance. | Yu Bai, Weidong Kuang |
| 2011 | A Novel Architecture for Scalable, High Throughput, Multi-standard LDPC Decoder. | Muhammad Awais, Ashwani Singh, Emmanuel Boutillon, Guido Masera |
| 2011 | Architectures for Fast Modular Multiplication. | Ahmet Aris, Siddika Berna rs, Gkay Saldamli |