| 1999 | PulseDSP - A Signal Processing Oriented Programmable Architecture. | Gareth Jones |
| 1999 | A Wildcarding Mechanism for Acceleration of Partial Configurations. | Philip James-Roxby, Elena Cerro-Prada |
| 1999 | Logical-to-Physical Memory Mapping for FPGAs with Dual-Port Embedded Arrays. | William K. C. Ho, Steven J. E. Wilton |
| 1999 | SL - A Structural Hardware Design Language. | Samuel Holmstrm |
| 1999 | SONIC - A Plug-In Architecture for Video Processing. | Simon D. Haynes, Peter Y. K. Cheung, Wayne Luk, John Stone |
| 1999 | An Internet Based Development Framework for Reconfigurable Computing. | Reiner W. Hartenstein, Michael Herz, Ulrich Nageldinger, Thomas Hoffmann |
| 1999 | Mapping Applications onto Reconfigurable Kress Arrays. | Reiner W. Hartenstein, Michael Herz, Thomas Hoffmann, Ulrich Nageldinger |
| 1999 | FPGA Viruses. | Ilija Hadzic, Sanjay Udani, Jonathan M. Smith |
| 1999 | Run-Time Parameterizable Cores. | Steve Guccione, Delon Levi |
| 1999 | Reconfigurable Processors for High-Performance, Embedded Digital Signal Processing. | Paul S. Graham, Brent E. Nelson |
| 1999 | Power Modelling in Field Programmable Gate Arrays (FPGA). | Andrs D. Garca, Wayne P. Burleson, Jean-Luc Danger |
| 1999 | Rapid FPGA Prototyping of a DAB Test Data Generator Using Protocol Compiler. | Klaus Feske, Michael Scholz, Gnther Dring, Denis Nareike |
| 1999 | Tabu Search: Ultra-Fast Placement for FPGAs. | John Marty Emmert, Dinesh Bhatia |
| 1999 | Communication Synthesis for Reconfigurable Embedded Systems. | Michael Eisenring, Marco Platzner, Lothar Thiele |
| 1999 | An FPGA Implementation of Goertzel Algorithm. | Toms Dulk |
| 1999 | DIME - The First Module Standard for FPGA Based High Performance Computing. | Malachy Devlin, Allan J. Cantle |
| 1999 | Global Routing Models. | Martin Danek, Zdenek Muzikr |
| 1999 | The Proteus Processor - A Conventional CPU with Reconfigurable Functionality. | Michael Winston Dales |
| 1999 | Untitled record | George A. Constantinides, Peter Y. K. Cheung, Wayne Luk |
| 1999 | Analysis and Optimization of 3-D FPGA Design Parameters. | Silviu M. S. A. Chiricescu, Mankuan Michael Vai |
| 1999 | Hardware-Software Codesign for Dynamically Reconfigurable Architectures. | Karam S. Chatha, Ranga Vemuri |
| 1999 | IP Validation for FPGAs Using Hardware Object Technology. | Steve Casselman, John Schewel, Christophe Beaumont |
| 1999 | Dynamically Reconfigurable Reduced Crossbar: A Novel Approach to Large Scale Switching. | Tri Caohuu, Thuy Trong Le, Manfred Glesner, Jrgen Becker |
| 1999 | A Bipartitioning Algorithm for Dynamic Reconfigurable Programmable Logic. | E. Cant, Juan Manuel Moreno, Joan Cabestany, Julio Faura, Josep Maria Insenser |
| 1999 | Auditory Signal Processing in Hardware: A Linear Gammatone Filterbank Design for a Model of the Auditory System. | M. Brucke, Arne Schulz, Wolfgang Nebel |