| 2004 | Low Power Reconfigurable Devices. | Aman Gayasen |
| 2004 | Mapping DSP Applications to a High-Performance Reconfigurable Coarse-Grain Data-Path. | Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Constantinos E. Goutis |
| 2004 | Wavelet-Based Image Compression on the Reconfigurable Computer ACE-V. | Hagen Gdke, Andreas Koch |
| 2004 | Interconnecting Heterogeneous Nodes in an Adaptive Computing Machine. | Frederick C. Furtek, Eugene Hogenauer, James Scheuermann |
| 2004 | High Performance True Random Number Generator in Altera Stratix FPLDs. | Viktor Fischer, Milos Drutarovsk, Martin Simka, Nathalie Bochard |
| 2004 | Artificial Neural Networks Processor - A Hardware Implementation Using a FPGA. | Pedro Ferreira, Pedro Ribeiro, Ana Antunes, Fernando Morgado Dias |
| 2004 | A Development Support System for Applications That Use Dynamically Reconfigurable Hardware. | Joo Canas Ferreira, Jos Silva Matos |
| 2004 | An Environment for Exploring Data-Driven Architectures. | Ricardo S. Ferreira, Joo M. P. Cardoso, Horcio C. Neto |
| 2004 | On Optimal Irregular Switch Box Designs. | Hongbing Fan, Yu-Liang Wu, Chak-Chung Cheung, Jiping Liu |
| 2004 | Analog Signal Processing Reconfiguration for Systems-on-Chip Using a Fixed Analog Cell Approach. | Eric E. Fabris, Luigi Carro, Sergio Bampi |
| 2004 | Dual Fixed-Point: An Efficient Alternative to Floating-Point Computation. | Chun Te Ewe, Peter Y. K. Cheung, George A. Constantinides |
| 2004 | Evaluating Fault Emulation on FPGA. | Peeter Ellervee, Jaan Raik, Valentin Tihhomirov, Kalle Tammeme |
| 2004 | Mapping Basic Recursive Structures to Runtime Reconfigurable Hardware. | Hossam A. ElGindy, George Ferizis |
| 2004 | Large Scale Protein Sequence Alignment Using FPGA Reprogrammable Logic Devices. | Stefan Dydel, Piotr Bala |
| 2004 | Implementation of a 3-D Switching Median Filtering Scheme with an Adaptive LUM-Based Noise Detector. | Milos Drutarovsk, Viktor Fischer |
| 2004 | Efficient Modular Division Implementation: ECC over GF(p) Affine Coordinates Application. | Guerric Meurice de Dormale, Philippe Bulens, Jean-Jacques Quisquater |
| 2004 | The Chess Monster Hydra. | Chrilly Donninger, Ulf Lorenz |
| 2004 | A Virtual File System for Dynamically Reconfigurable FPGAs. | Adam Donlin, Patrick Lysaght, Brandon Blodget, Gerd Troeger |
| 2004 | SystemC for the Design and Modeling of Programmable Systems. | Adam Donlin, Axel Braun, Adam Rose |
| 2004 | System-Level Design Tools Can Provide Low Cost Solutions in FPGAs: TRUE or FALSE? | Mark Dickinson |
| 2004 | Real Time Optical Flow Processing System. | Javier Daz, Eduardo Ros, Sonia Mota, Richard R. Carrillo, Rodrigo Ags |
| 2004 | Second Order Function Approximation Using a Single Multiplication on FPGAs. | Jrmie Detrey, Florent de Dinechin |
| 2004 | A Key Agile 17.4 Gbit/sec Camellia Implementation. | Daniel Denning, James Irvine, Malachy Devlin |
| 2004 | Optimizing the Performance of the Simulated Annealing Based Placement Algorithms for Island-Style FPGAs. | Alexander Danilin, Sergei Sawitzki |
| 2004 | Storage Allocation for Diverse FPGA Memory Specifications. | Dalia Dagher, Iyad Ouaiss |