| 2007 | Untangling twisted nets for bus routing. | Tan Yan, Martin D. F. Wong |
| 2007 | Can nano-photonic silicon circuits become an INTRA-chip interconnect technology? | Eli Yablonovitch |
| 2007 | Accurate detection for process-hotspots with vias and incomplete specification. | Jingyu Xu, Subarna Sinha, Charles C. Chiang |
| 2007 | Fast exact Toffoli network synthesis of reversible logic. | Robert Wille, Daniel Groe |
| 2007 | Timing optimization by restructuring long combinatorial paths. | Jrgen Werber, Dieter Rautenbach, Christian Szegedy |
| 2007 | An incremental learning framework for estimating signal controllability in unit-level verification. | Charles H.-P. Wen, Li-C. Wang, Jayanta Bhadra |
| 2007 | Extending systems-on-chip to the third dimension: performance, cost and technological tradeoffs. | Roshan Weerasekera, Li-Rong Zheng, Dinesh Pamunuwa, Hannu Tenhunen |
| 2007 | The design and synthesis of a synchronous and distributed MAC protocol for wireless network-on-chip. | Yi Wang, Dan Zhao |
| 2007 | An efficient method to identify critical gates under circuit aging. | Wenping Wang, Zile Wei, Shengqi Yang, Yu Cao |
| 2007 | Variation-aware task allocation and scheduling for MPSoC. | Feng Wang, Chrysostomos Nicopoulos, Xiaoxia Wu, Yuan Xie, Narayanan Vijaykrishnan |
| 2007 | Hybrid CEGAR: combining variable hiding and predicate abstraction. | Chao Wang, Hyondeuk Kim, Aarti Gupta |
| 2007 | A frequency-domain technique for statistical timing analysis of clock meshes. | Ruilin Wang, Cheng-Kok Koh |
| 2007 | Gate sizing by Lagrangian relaxation revisited. | Jia Wang, Debasish Das, Hai Zhou |
| 2007 | Incremental learning approach and SAT model for Boolean matching with don't cares. | Kuo-Hua Wang, Chung-Ming Chan |
| 2007 | Sensitivity analysis for oscillators. | Igor Vytyaz, David C. Lee, Pavan Kumar Hanumolu, Un-Ku Moon, Kartikeya Mayaram |
| 2007 | Checking equivalence of quantum circuits and states. | George F. Viamontes, Igor L. Markov, John P. Hayes |
| 2007 | Operation chaining asynchronous pipelined circuits. | Girish Venkataramani, Seth Copen Goldstein |
| 2007 | Exploiting hierarchy and structure to efficiently solve graph coloring as SAT. | Miroslav N. Velev |
| 2007 | Analysis and optimization of power-gated ICs with multiple power gating configurations. | Aida Todri, Malgorzata Marek-Sadowska, Shih-Chieh Chang |
| 2007 | Practical method for obtaining a feasible integer solution in hierarchical layout optimization. | Xiaoping Tang, Xin Yuan, Michael S. Gray |
| 2007 | Parallel domain decomposition for simulation of large-scale power grids. | Kai Sun, Quming Zhou, Kartik Mohanram, Danny C. Sorensen |
| 2007 | Bounding L2 gain system error generated by approximations of the nonlinear vector field. | Kin Cheong Sou, Alexandre Megretski, Luca Daniel |
| 2007 | A methodology for fast and accurate yield factor estimation during global routing. | Subarna Sinha, Charles C. Chiang |
| 2007 | Efficient decoupling capacitance budgeting considering operation and process variations. | Yiyu Shi, Jinjun Xiong, Chunchen Liu, Lei He |
| 2007 | Including inductance in static timing analysis. | Ahmed Shebaita, Dusan Petranovic, Yehea I. Ismail |