| 2006 | Layer minimization of escape routing in area array packaging. | Renshen Wang, Rui Shi, Chung-Kuan Cheng |
| 2006 | Robust estimation of parametric yield under limited descriptions of uncertainty. | Wei-Shen Wang, Michael Orshansky |
| 2006 | On the use of Bloom filters for defect maps in nanocomputing. | Gang Wang, Wenrui Gong, Ryan Kastner |
| 2006 | Leveraging protocol knowledge in slack matching. | Girish Venkataramani, Seth Copen Goldstein |
| 2006 | Combinatorial algorithms for fast clock mesh optimization. | Ganesh Venkataraman, Zhuo Feng, Jiang Hu, Peng Li |
| 2006 | Design and integration methods for a multi-threaded dual core 65nm Xeon processor. | Raj Varada, Mysore Sriram, Kris Chou, James Guzzo |
| 2006 | Un/DoPack: re-clustering of large system-on-chip designs with interconnect variation for low-cost FPGAs. | Marvin Tom, David Leong, Guy G. Lemieux |
| 2006 | High-level synthesis challenges and solutions for a dynamically reconfigurable processor. | Takao Toi, Noritsugu Nakamura, Yoshinosuke Kato, Toru Awashima, Kazutoshi Wakabayashi, Li Jing |
| 2006 | Faster, parametric trajectory-based macromodels via localized linear reductions. | Saurabh K. Tiwary, Rob A. Rutenbar |
| 2006 | Technology migration techniques for simplified layouts with restrictive design rules. | Xiaoping Tang, Xin Yuan |
| 2006 | Analog placement with symmetry and other placement constraints. | Yiu-Cheong Tam, Evangeline F. Y. Young, Chris C. N. Chu |
| 2006 | Application-independent defect-tolerant crossbar nano-architectures. | Mehdi Baradaran Tahoori |
| 2006 | Thermal characterization and optimization in platform FPGAs. | Priya Sundararajan, Aman Gayasen, Narayanan Vijaykrishnan, Tim Tuan |
| 2006 | A code refinement methodology for performance-improved synthesis from C. | Greg Stitt, Frank Vahid, Walid A. Najjar |
| 2006 | Algorithms for MIS vector generation and pruning. | Kenneth S. Stevens, Florentin Dartu |
| 2006 | Fast and robust quadratic placement combined with an exact linear net model. | Peter Spindler, Frank M. Johannes |
| 2006 | A timing dependent power estimation framework considering coupling. | Debjit Sinha, DiaaEldin Khalil, Yehea I. Ismail, Hai Zhou |
| 2006 | Information theoretic approach to address delay and reliability in long on-chip interconnects. | Rohit Singhal, Gwan S. Choi, Rabi N. Mahapatra |
| 2006 | A unified non-rectangular device and circuit simulation model for timing and power. | Sean X. Shi, Peng Yu, David Z. Pan |
| 2006 | A gate delay model focusing on current fluctuation over wide-range of process and environmental variability. | Kenichi Shinkai, Masanori Hashimoto, Atsushi Kurokawa, Takao Onoye |
| 2006 | Testing delay faults in asynchronous handshake circuits. | Feng Shi, Yiorgos Makris |
| 2006 | Variability and yield improvement: rules, models, and characterization. | Kenneth L. Shepard, Daniel N. Maynard |
| 2006 | Conjoining soft-core FPGA processors. | David Sheldon, Rakesh Kumar, Frank Vahid, Dean M. Tullsen, Roman L. Lysecky |
| 2006 | Application-specific customization of parameterized FPGA soft-core processors. | David Sheldon, Rakesh Kumar, Roman L. Lysecky, Frank Vahid, Dean M. Tullsen |
| 2006 | SMT( | Hossein M. Sheini, Karem A. Sakallah |