| 2003 | Energy Optimization of Distributed Embedded Processors by Combined Data Compression and Functional Partitioning. | Jinfeng Liu, Pai H. Chou |
| 2003 | SILCA: Fast-Yet-Accurate Time-Domain Simulation of VLSI Circuits with Strong Parasitic Coupling Effects. | Zhao Li, Chuanjin Richard Shi |
| 2003 | Retiming for Wire Pipelining in System-On-Chip. | Chuan Lin, Hai Zhou |
| 2003 | A Hybrid Approach to Nonlinear Macromodel Generation for Time-Varying Analog Circuits. | Peng Li, Xin Li, Yang Xu, Lawrence T. Pileggi |
| 2003 | Full-Chip Interconnect Power Estimation and Simulation Considering Concurrent Repeater and Flip-Flop Insertion. | Weiping Liao, Lei He |
| 2003 | Circuit Simulation of Nanotechnology Devices with Non-monotonic I-V Characteristics. | Jiayong Le, Lawrence T. Pileggi, Anirudh Devgan |
| 2003 | A Min-Cost Flow Based Detailed Router for FPGAs. | Seokjin Lee, Yongseok Cheon, Martin D. F. Wong |
| 2003 | On the Interaction Between Power-Aware FPGA CAD Algorithms. | Julien Lamoureux, Steven J. E. Wilton |
| 2003 | ATPG for Noise-Induced Switch Failures in Domino Logic. | Rahul Kundu, R. D. (Shawn) Blanton |
| 2003 | Adjustable Width Linear Combinational Scan Vector Decompression. | C. V. Krishna, Nur A. Touba |
| 2003 | Static Verification of Test Vectors for IR Drop Failure. | Aman Kokrady, C. P. Ravikumar |
| 2003 | Leakage Power Optimization Techniques for Ultra Deep Sub-Micron Multi-Level Caches. | Nam Sung Kim, David T. Blaauw, Trevor N. Mudge |
| 2003 | A Probabilistic Approach to Buffer Insertion. | Vishal Khandelwal, Azadeh Davoodi, Akash Nanavati, Ankur Srivastava |
| 2003 | Mixed Signal DFT: A Concise Overview. | Bozena Kaminska, Karim Arabi |
| 2003 | LRU-SEQ: A Novel Replacement Policy for Transition Energy Reduction in Instruction Caches. | Praveen Kalla, Xiaobo Sharon Hu, Jrg Henkel |
| 2003 | Evaluation of Placement Techniques for DNA Probe Array Layout. | Andrew B. Kahng, Ion I. Mandoiu, Sherief Reda, Xu Xu, Alexander Zelikovsky |
| 2003 | SATORI - A Fast Sequential SAT Engine for Circuits. | Madhu K. Iyer, Ganapathy Parthasarathy, Kwang-Ting Cheng |
| 2003 | A Game Theoretic Approach to Dynamic Energy Minimization in Wireless Transceivers. | Ali Iranli, Hanif Fatemi, Massoud Pedram |
| 2003 | Efficient Generation of Monitor Circuits for GSTE Assertion Graphs. | Alan J. Hu, Jeremy Casas, Jin Yang |
| 2003 | Approaching the Maximum Energy Saving on Embedded Systems with Multiple Voltages. | Shaoxiong Hua, Gang Qu |
| 2003 | Synthesis of Heterogeneous Distributed Architectures for Memory-Intensive Applications. | Chao Huang, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha |
| 2003 | Clock Period Minimization of Non-Zero Clock Skew Circuits. | Shih-Hsu Huang, Yow-Tyng Nieh |
| 2003 | A Fast Crosstalk- and Performance-Driven Multilevel Routing System. | Tsung-Yi Ho, Yao-Wen Chang, Sao-Jie Chen, D. T. Lee |
| 2003 | Clock Scheduling and Clocktree Construction for High Performance ASICS. | Stephan Held, Bernhard Korte, Jens Maberg, Matthias Ringe, Jens Vygen |
| 2003 | Equivalent Waveform Propagation for Static Timing Analysis. | Masanori Hashimoto, Yuji Yamada, Hidetoshi Onodera |