| 2020 | Adaptable and Divergent Synthetic Benchmark Generation for Hardware Security. | Sarah Amir, Domenic Forte |
| 2020 | Re-examining VLSI Manufacturing and Yield through the Lens of Deep Learning : (Invited Talk). | Mohamed Baker Alawieh, Wei Ye, David Z. Pan |
| 2020 | Noise Resilient Compilation Policies for Quantum Approximate Optimization Algorithm. | Mahabubul Alam, Abdullah Ash-Saki, Junde Li, Anupam Chattopadhyay, Swaroop Ghosh |
| 2020 | The Safe and Effective Application of Probabilistic Techniques in Safety-Critical Systems. | Kunal Agrawal, Sanjoy K. Baruah, Zhishan Guo, Jing Li |
| 2020 | VLSI Placement Parameter Optimization using Deep Reinforcement Learning. | Anthony Agnesina, Kyungwook Chang, Sung Kyu Lim |
| 2020 | A Lightweight Approach to Detect Malicious/Unexpected Changes in the Error Rates of NISQ Computers. | Nikita Acharya, Samah Mohamed Saeed |
| 2020 | Structural Synthesis of Operational Amplifiers Based on Functional Block Modeling. | Inga Abel, Helmut Graeb |
| 2020 | Know the Unknowns: Addressing Disturbances and Uncertainties in Autonomous Systems : Invited Paper. | Qi Zhu, Wenchao Li, Hyoseung Kim, Yecheng Xiang, Kacper Wardega, Zhilu Wang, Yixuan Wang, Hengyi Liang, Chao Huang, Jiameng Fan, Hyunjong Choi |
| 2020 | A Simulator and Compiler Framework for Agile Hardware-Software Co-design Evaluation and Exploration. | Tyler Sorensen, Aninda Manocha, Esin Tureci, Marcelo Orenes-Vera, Juan L. Aragn, Margaret Martonosi |
| 2020 | Effective Analog/Mixed-Signal Circuit Placement Considering System Signal Flow. | Keren Zhu, Hao Chen, Mingjie Liu, Xiyuan Tang, Nan Sun, David Z. Pan |
| 2020 | F2VD: Fluid Rates to Virtual Deadlines for Precise Mixed-Criticality Scheduling on a Varying-Speed Processor. | Kecheng Yang, Ashikahmed Bhuiyan, Zhishan Guo |
| 2020 | Machine Learning and Hardware security: Challenges and Opportunities -Invited Talk-. | Francesco Regazzoni, Shivam Bhasin, Amir Alipour, Ihab Alshaer, Furkan Aydin, Aydin Aysu, Vincent Beroulle, Giorgio Di Natale, Paul D. Franzon, David Hly, Naofumi Homma, Akira Ito, Dirmanto Jap, Priyank Kashyap, Ilia Polian, Seetal Potluri, Rei Ueno, Elena-Ioana Vatajelu, Ville Yli-Myry |
| 2019 | How to Efficiently Handle Complex Values? Implementing Decision Diagrams for Quantum Computing. | Alwin Zulehner, Stefan Hillmich, Robert Wille |
| 2019 | A General Logic Synthesis Framework for Memristor-based Logic Design. | Zhenhua Zhu, Mingyuan Ma, Jialong Liu, Liying Xu, Xiaoming Chen, Yuchao Yang, Yu Wang, Huazhong Yang |
| 2019 | GeniusRoute: A New Analog Routing Paradigm Using Generative Neural Network Guidance. | Keren Zhu, Mingjie Liu, Yibo Lin, Biying Xu, Shaolan Li, Xiyuan Tang, Nan Sun, David Z. Pan |
| 2019 | Resolving the Trilemma in Logic Encryption. | Hai Zhou, Amin Rezaei, Yuanqi Shen |
| 2019 | Design Technology for Scalable and Robust Photonic Integrated Circuits: Invited Paper. | Zheng Zhao, Jiaqi Gu, Zhoufeng Ying, Chenghao Feng, Ray T. Chen, David Z. Pan |
| 2019 | Tucker Tensor Decomposition on FPGA. | Kaiqi Zhang, Xiyuan Zhang, Zheng Zhang |
| 2019 | SFLL-HLS: Stripped-Functionality Logic Locking Meets High-Level Synthesis. | Muhammad Yasin, Chongzhi Zhao, Jeyavijayan (JV) Rajendran |
| 2019 | MAGICAL: Toward Fully Automated Analog IC Layout Leveraging Human and Machine Intelligence: Invited Paper. | Biying Xu, Keren Zhu, Mingjie Liu, Yibo Lin, Shaolan Li, Xiyuan Tang, Nan Sun, David Z. Pan |
| 2019 | ACG-Engine: An Inference Accelerator for Content Generative Neural Networks. | Haobo Xu, Ying Wang, Yujie Wang, Jiajun Li, Bosheng Liu, Yinhe Han |
| 2019 | Approximating Behavioral HW Accelerators through Selective Partial Extractions onto Synthesizable Predictive Models. | Siyuan Xu, Benjamin Carrin Schfer |
| 2019 | Zac: Towards Automatic Optimization and Deployment of Quantized Deep Neural Networks on Embedded Devices. | Qingcheng Xiao, Yun Liang |
| 2019 | Strengthening PUFs using Composition. | Zhuanhao Wu, Hiren D. Patel, Manoj Sachdev, Mahesh V. Tripunitara |
| 2019 | Accelergy: An Architecture-Level Energy Estimation Methodology for Accelerator Designs. | Yannan Nellie Wu, Joel S. Emer, Vivienne Sze |